-
公开(公告)号:WO2022108864A1
公开(公告)日:2022-05-27
申请号:PCT/US2021/059320
申请日:2021-11-15
Applicant: TEXAS INSTRUMENTS INCORPORATED
Abstract: A power stage controller (106 A) includes: a multi-phase pulse control circuit (124); a current sense circuit (204); a comparator (116); an error amplifier (108); and a mode controller (135). The mode controller (135) includes a mode controller input (136) and a summation circuit (210). The summation circuit (210) has a first summation circuit input (214), a second summation circuit input (212) and a summation circuit output (216), the first summation circuit input (214) is coupled to the error amplifier output (114), and the summation circuit output (216) is coupled to the first comparator input (118). The mode controller (135) is configured to: select one of a main controller mode or a secondary controller mode responsive to a mode control voltage at the mode controller input (136); bypass the summation circuit (210) responsive to selection of the main controller mode; and enable the summation circuit (210) responsive to selection of the secondary controller mode.
-
公开(公告)号:WO2021061547A1
公开(公告)日:2021-04-01
申请号:PCT/US2020/051742
申请日:2020-09-21
Inventor: NARULA, Rohit , TADEPARTHY, Preetam Charan Anand , JAIN, Mayank
IPC: H03M1/00
Abstract: An analog-to-digital converter (ADC) includes a digital-to-analog converter (DAC, 408) having a resistor network. The resistor network includes a first and second segments (B0-B9, T1-T15). The first segment (B0-B9, T1-T15) includes a first switch (SW) coupled between a first supply voltage node and a first set of resistors (R). The second segment (T13, T14) includes a second switch (SW) coupled between the first supply voltage node and a second set (450) of resistors. The first segment includes a third switch coupled in series with a second resistor. The series-combination of the third switch and second resistor are coupled in parallel with at least one resistor of the first set of resistors. The second segment includes a fourth switch coupled in series with a third resistor. The series-combination of the fourth switch and third resistor is coupled in parallel with at least one resistor of the second set of resistors.
-