Abstract:
The invention relates to a trimming of analogue filters (201) in integrated circuits by means of an automatic adjusting circuit. A local osciallator (202) in the automatic adjusting circuit provides a periodic reference signal (R) to an adjustable phase shifter (203), which on basis thereof, produces a periodic phase shifted signal (R * ). A phase detector (204) receives both the periodic reference signal (R) and the phase shifted periodic signal (R * ) and produces a test signal (T) in response to a phase difference between the periodic reference signal (R) and the periodic phase shifted signal (R * ). A lowpass filter (205) receives the test signal (T) and generates a level signal (T DC ) representing a DC component of the test signal (T). A comparator (206) receives the test signal (T DC ) and produces an observation signal (M) on basis of the level signal (T DC ) relative a reference level, e.g. representing a zero voltage. A digital signal processor (207) produces a primary control signal (C S ), having a serial format , on basis of the observation signal (M). A serial-to-parallel converter (208) converts the primary control signal (C S ) into a control signal (C P ) having a parallel signal format.The control signal (C P ) influences a magnitude of at least one component value in the adjustable phase shifter (203) and is allocated such value that the phase shift between the periodic reference signal (R) and the periodic phase shifted signal (R * ) attains a calibrated value being as close as possible to a desired value. A latch (210) forwards at least one signal element of the control signal (C P ) for setting of at least one component value in the analogue filter (201) in accordance with a setting of the at least one component value in the adjustable phase shifter (203) which produces the calibrated value.
Abstract:
スイッチの切り替えにより何れかの抵抗素子を選択することで同調周波数f F を可変にする可変同調フィルタ11と、可変同調フィルタ11と同様に構成した発振回路12とを備え、周波数カウンタ13でモニタリングした発振回路12の発振周波数f L と、制御回路14によりあらかじめ設定された希望受信周波数f r とをそれぞれの周波数カウント値によって比較し、両者の周波数が許容誤差範囲内で一致するように発振回路12の発振周波数f L を変え、これに合わせて可変同調フィルタ11の同調周波数f F も変えることにより、IC化が難しい可変容量ダイオード等は使用せずに、可変同調フィルタ11の同調周波数f F が希望受信周波数f r と一致するように調整できるようにする。
Abstract translation:一种天线输入调谐电路,包括可变调谐滤波器(11),用于通过切换来选择电阻元件中的任何一个来使调谐频率f 变化,以及类似于变量的振荡电路(12) 调谐滤波器(11),其中由频率计数器(13)监视的振荡电路(12)的振荡频率f L L L与期望的接收频率f N 基于相应的频率计数由控制电路(14)预置的振荡电路(12)的振荡频率f L L L被改变,使得两个频率在允许的误差范围内重合,然后调谐频率 可变调谐滤波器(11)的f F F相应地变化,从而调节可变调谐滤波器(11)的调谐频率f F 1与所需的接收频率 不使用可变电容二极管等难以去除 IC为主。
Abstract:
A tunable electronic filter circuit (10) includes an input terminal (12) and an output terminal (14) with a node (13) therebetween. An inductor (16), a variable capacitor (18), and a variable resistor (20) are connected between the node (13) and ground (21). A feedback control circuit (22) is coupled to tune the variable capacitor (18) to set the center frequency of the filter circuit (10) and to tune the variable resistor (20) in order to calibrate the Q of the filter (10). Optionally, a "slave" tunable electronic filter circuit may be provided which includes a second variable capacitor and variable resistor which are also controlled by the feedback control circuit (22) which allows the "slave" filter circuit to be tuned while being used.
Abstract:
A filter tuning system for quickly compensating a time constant using a binary search algorithm is disclosed. The filter tuning system includes a time constant detector, a comparator and a calibration unit. The time constant detector detects a time constant of a filter based on an integral value of a reference input signal using an integrator when the time constant of the filter changes according to a variation of a manufacturing process or a temperature. The integrator includes a capacitor changing according to a variation of the time constant of the filter. The comparator compares the detected time constant with a reference value. The calibration unit compensates the time constant of the filter using the binary search algorithm based on the comparison result until an error between the time constant and the reference value is reduced within an acceptable range.
Abstract:
A broadband tuner includes a tracking filter with calibration to compensate for component errors and drift. The filters use off-die inductors that are preferably within a system-in- package (SIP) with other critical tuner components, which produces a highly integrated tuner front end with high Q filters within a single package. High voltage varactors with a large tuning range can be used for variable capacitors. The integration of the tuner into a SIP allows the tuner design to be optimized for cost and performance while keeping the critical RF layout requirements within the tuner. A configurable tuner front end enables modes for low noise, high linearity, good input return loss (Sl 1) across the entire RF band, and applying a test tone in the calibration mode. The switchable mode enables the tuner to be effective during weak terrestrial reception, strong terrestrial reception, and connection to a cable plant.