Abstract:
A trailing edge phase control dimmer circuit for controlling alternating current (AC) power to a load, the circuit including: a switching circuit for controlling delivery of AC power to the load by conducting power to the load in an ON state and not conducting power to the load in an OFF state; and a switching control circuit for controlling turn-OFF and turn-ON of the switching circuit at each cycle of the AC to control switching of the ON and OFF states of the switching circuit, wherein the switching control circuit controlling turn-OFF of the switching circuit includes controlling a turn-OFF transition of the switching circuit between the ON state and the OFF state of the switching circuit extending for a selected turn-OFF transition time, and wherein the switching control circuit further includes a dv/dt feedback circuit for controlling a turn-OFF transition profile indicative of a drain voltage of the switching circuit of the turn-OFF transition and the selected turn-OFF transition time by returning at least some dv/dt feedback current generated by the switching circuit back to the switching circuit, whereby the dv/dt feedback circuit is configured to control said at least some dv/dt feedback current over the turn-OFF transition so as to reduce a rate of change of at least an initial region of the turn-OFF transition profile to minimise harmonics generation by the switching circuit.
Abstract:
We describe a methods of controlling the drive to a BJT or IGBT transistor to control the saturation of said transistor to achieve fast turn-off. An embodiment of the method comprises determining a quantity of charge in the transistor for a combination of collector current and a time for which said collector current flows, and delivering a pulse of current or voltage to a control terminal of said BJT or IGBT transistor such that a total quantity of charge delivered to a base of said BJT or to an internal base of said IGBT in said pulse of base or gate current or voltage is sufficient to maintain said collector current for said time and to sustain said transistor in saturation or quasi - saturation up to or after the end of said base current or gate voltage pulse until the end of said time.
Abstract:
The control circuit comprises a transformer adapted to send to the base of the power transistor a current which is proportional to the current flowing through the collector. The circuit further comprises a first transistor (TS1) fit to control the power transistor (TS5) by means of a second and a third transistor (TS2 and TS3). The power transistor's (TS5) collector is connected to the collector of the third transistor by means of a resistance (R7), having further the base connected to a negative supply source (-Vc) by means of a first diode (DD6) and a field effect transistor (TS4). The gate electrode of said transistor is connected to the first transistor's (TS1) collector by means of a second diode (DD1) and to the power transistor's collector by means of a third diode (DD2).
Abstract:
Un circuit de commutation de transistor permet d'effectuer la commutation d'un transistor de puissance (28) d'un état sous tension vers un état hors tension à des vitesses élevées avec une dissipation minimum de puissance et sans rencontrer de charges disruptives secondaires dans le transistor de puissance. Le circuit de commutation du transistor comprend un transformateur (36) ayant un enroulement secondaire (35) connecté à la base (30) du transistor de puissance (28) et un enroulement primaire (49) connecté à une logique de commutation (38), le transformateur (36) assurant une isolation galvanique entre le transistor de puissance (28) et la logique de commutation (38). La logique de commutation (38) comprend un premier commutateur (50) et un second commutateur (52). Lorsque le premier commutateur (50) est sous tension et le second commutateur (52) est hors tension, l'enroulement secondaire (35) du transformateur (36) développe un courant de base positif appliqué au transistor de puissance (28), mettant ainsi le transistor sous tension. Pour unifier la commutation du transistor (28) sur son état hors circuit, le premier et le second commutateurs (50, 52) sont tous les deux en circuit, ce qui fait cesser la conduction de courant par l'enroulement secondaire (35) pour permettre aux porte-charges collecteurs du transistor (28) de se recombiner. Après que les porte-charges collecteurs sont recombinés de manière suffisante, cette recombinaison étant détectée par un circuit de détection de saturation (62), le premier commutateur (50) est mis hors circuit, le second commutateur (52) restant sur "on" de sorte que l'enroulement secondaire (35) développe un courant négatif appliqué sur la base du transistor de puissance (28), mettant le transistor (28) rapidement sur "off". Le circuit de commutation du transistor comprend en outre des moyens pour limiter la tension d'émission de base du transistor et des moyens pour remettre à zéro rapidement le noyau du transformateur.
Abstract:
Die Erfindung betrifft ein Verfahren zum Einschalten eines bipolaren schaltbaren Leistungshalbleiterbauelements (703). In einem ersten Zeitabschnitt (t0-t1) wird die Gate-Emitter-Spannung (VGE) des Leistungshalbleiterbauelements (703) mit einer ersten mittleren Spannungsänderungsgeschwindigkeit (dVGE_1/dt) bis zu einem ersten Spannungswert (V1) erhöht. Danach wird in einem zweiten Zeitabschnitt (t1-t2) die Gate-Emitter-Spannung (VGE) konstant gehalten oder bis zu einem zweiten Spannungswert (V2) erhöht, wobei die Gate-Emitter-Spannung in dem zweiten Zeitabschnitt eine zweite mittlere Spannungsänderungsgeschwindigkeit (dVGE_2/dt) aufweist, die kleiner ist als die erste mittlere Spannungsänderungsgeschwindigkeit (dVGE_1/dt). In einem dritten Zeitabschnitt (t2-t3) wird die Gate-Emitter-Spannung mit einer dritten mittleren Spannungsänderungsgeschwindigkeit (dVGE_3/dt) bis zu einem dritten Spannungswert (V3) erhöht, wobei die dritte mittlere Spannungsänderungsgeschwindigkeit (dVGE_3/dt) größer ist als die zweite mittlere Spannungsänderungsgeschwindigkeit (dVGE_2/dt) und der dritte Spannungswert (V3) größer als oder gleich 18V ist.
Abstract:
A small-sized lightweight power converter of high efficiency with low conduction loss. The power converter includes a drive circuit for driving a switching element, in which a current-controlled switching element is connected with the primary side of a current transformer, and the switching element is supplied with a drive current that is the output current produced by a drive current generator formed of the secondary winding of the current transformer and a rectifier connected with the secondary winding. The output current of the switching element is detected, and a portion of the output current from the drive current generator is diverged outside the drive circuit so that the drive current for the switching element may vary depending on the detected output current. The diverged output current from the drive current generator is preferably supplied as regeneration power to any auxiliary power supply.
Abstract:
In a driving circuit (2, 3) for a semiconductor switching element (1), a storage time (Ts) of the semiconductor switching element (1) is measured (2) to control the semiconductor switching element (1) such that the storage time (Ts) is kept substantially constant.
Abstract:
The description relates to a final ignition stage (1), especially for internal combustion engines, in which the final stage consists of two or three-stage Darlington circuits (T1, T2) and, for overvoltage protection, has either an internal single-stage or an external multi-stage clamp via a Zener diode (Z1), where a short-circuit transistor (T3) is fitted on the drive terminal (B) of the Darlington circuit in parallel to the base-emitter line of the ignition Darlington circuit (T1, T2) for protection against parasitic currents.