公开(公告)号：WO2008110119A1

公开(公告)日：2008-09-18

申请号：PCT/CN2008/070481

申请日：2008-03-12

Applicant: 华为技术有限公司 ,  董立民 ,  吴秋游

Inventor： 董立民 ,  吴秋游

IPC: H04J3/16

CPC classification number: H04L12/66 ,  H04J3/07 ,  H04J3/1658 ,  H04J2203/0085 ,  H04J2203/0094

Abstract: A method for transporting multiple channels Ethernet data, the device and the system thereof, the method includes mainly: constituting multiple transmission channel of the virtual cascade by using multiple time slot channels and justification codes set in the optical channel payload unit virtual cascade frame structure OPUk-Xv; transporting one channel separate Ethernet data respectively by each transmission channel of the multiple transmission channels. The technical scheme can realize OTN (Optical Transport Network) transporting transparent multiple channel separate Ethernet data, and resolve the problem that the network time delay can not be controlled while the multiple separate Ethernet data crosses OTN, and the problem that the frequency deviation range do not adapt to the Ethernet interface defined in the IEEE (Institute for Electrical and Electronic Engineers) series.

公开(公告)号：WO2007002789A3

公开(公告)日：2007-04-19

申请号：PCT/US2006025263

申请日：2006-06-27

Applicant: TEKNOVUS INC ,  BOYD EDWARD W ,  HIRTH RYAN E ,  NGUYEN HUNG

Inventor： BOYD EDWARD W ,  HIRTH RYAN E ,  NGUYEN HUNG

IPC: H04L7/00

CPC classification number: H04J3/0638 ,  H04J3/0652 ,  H04J3/0682 ,  H04J3/07 ,  H04J3/1694 ,  H04Q11/0067 ,  H04Q2011/0079

Abstract: One embodiment of the present invention provides a system that accommodates different clock frequencies in an EPON. The system receives a signal from the OLT at the ONU and derives an OLT clock. The system also maintains a local clock. The system further receives from the OLT an assignment for an upstream transmission window, during which the ONU can transmit an upstream data burst to the OLT based on the local clock. The system adjusts the number of bits of the data burst without affecting the payload data carried in the data burst, thereby allowing the data burst to fit properly within the upstream transmission window and compensating for frequency differences between the local clock and the OLT clock. The system transmits the data burst based on the local clock in the upstream transmission window.

Abstract translation: 本发明的一个实施例提供一种在EPON中适应不同时钟频率的系统。 系统从ONU接收来自OLT的信号，得到OLT时钟。 该系统还维护本地时钟。 该系统还从OLT接收用于上行传输窗口的分配，在该传输窗口期间，ONU可以基于本地时钟向OLT发送上行数据突发。 该系统调整数据脉冲串的位数，而不影响数据脉冲串中承载的有效载荷数据，从而允许数据脉冲串适配于上游传输窗口内，并补偿本地时钟与OLT时钟之间的频率差异。 系统根据上行传输窗口中的本地时钟传输数据脉冲串。

公开(公告)号：WO2004056023A1

公开(公告)日：2004-07-01

申请号：PCT/NO2002/000483

申请日：2002-12-16

Applicant: TELEFONAKTIEBOLAGET LM ERICSSON (publ) ,  HØYER, Fredrik ,  KVAMME, Arne

Inventor： HØYER, Fredrik ,  KVAMME, Arne

IPC: H04J3/07

CPC classification number: H04J3/07

Abstract: A method for bit stuffing a data stream, in which data is read from an input buffer, the data is bit stuffed and stored in an output buffer. One byte for evaluation is collected from the input buffer at a time. This byte is divided into two 4-bit groups Msb4 and Lsb4. The two 4-bit groups are evaluated together to decide if the bits must be bit stuffed or not. The evaluation is based upon counting the number of consecutive ones in the two 4-bit groups. Msb4 is the four most significant bits and the number of ones is counted by starting with the least significant bit (LSB). Lsb4 is the four least significant bits and the number of ones is counted by starting with the most significant bit (MSB). If the sum of the consecutive LSB ones in Msb4 and the consecutive MSB ones in Lsb4 is greater or equal to 5 then bit stuffing must be performed.

Abstract translation: 一种用于比特填充从输入缓冲器读取数据的数据流的方法，将数据填充并存储在输出缓冲器中。 一次从输入缓冲区收集一个用于评估的字节。 该字节被分成两个4位组Msb4和Lsb4。 两个4位组一起进行评估，以确定位是否必须位填充。 评估基于对两个4位组中的连续数的计数。 Msb4是四个最高有效位，并且通过从最低有效位（LSB）开始来计数个数。 Lsb4是四个最低有效位，通过以最高有效位（MSB）开始，对数的数目进行计数。 如果Msb4中的连续LSB 1和Lsb4中的连续MSB 1之和大于或等于5，则必须执行位填充。

公开(公告)号：WO03017546A3

公开(公告)日：2003-08-14

申请号：PCT/DE0202586

申请日：2002-07-15

Applicant: SIEMENS AG ,  MUELLER HORST

Inventor： MUELLER HORST

IPC: H04J3/07 ,  H04Q11/04 ,  H04J3/06 ,  H04J3/16

CPC classification number: H04J3/07 ,  H04J2203/0085

Abstract: The invention relates to a method and a device for adapting the clock-pulse rates of a first digital signal (DS1) which is inserted into pulse frames to a second clock-pulse rate (T2). The first signal (DS1) is continuously written into an intermediate memory (PS1) wherein several bits or bit sequences are stored intermediately. The first signal (DS1) is read out of the intermediate memory (PS1) with a second clock-pulse rate.A specific number of selected bits or bit sequences (BA) is inserted into the pulse frame during read-out or removed therefrom, whereby a second signal (DS2) is obtained with the desired second clock-pulse rate (T2), the number of bits or bit sequences being modified and the pulse frame being essentially of the same duration.

Abstract translation: 本发明涉及一种方法和用于调整插入到第一信号（DS1）的数字脉冲帧的时钟速率的第二时钟速率（T2）的布置。 这里，第一信号（DS1）连续成一个缓冲存储器（PS1）被写入，其中多个比特或比特序列被缓存。 在第二时钟速率（T2），从缓冲存储器（PS1）的第一信号（DS1）被读取。 当读取特定数量的选择的比特或比特序列被（BA）加入到该脉冲帧或从帧脉冲移除。 这产生具有期望的第二时钟速率（T2），其中位或位序列的数量被改变，具有基本上相同的持续时间的脉冲帧的第二信号（DS2）。

公开(公告)号：WO0028683A9

公开(公告)日：2002-08-22

申请号：PCT/US9926486

申请日：1999-11-09

Applicant: INTERA SYSTEMS INC

Inventor： SWEAZEY PAUL M

IPC: H04J3/06 ,  H04J3/07 ,  H04Q11/04 ,  G06F15/173 ,  H04L12/64

CPC classification number: H04Q11/0421 ,  H04J3/0602 ,  H04J3/0647 ,  H04J3/0658 ,  H04J3/0685 ,  H04J3/07 ,  H04L12/403 ,  H04L12/6418

Abstract: A switch fabric (100) is disclosed in which a cycle master node (104) is coupled to destination nodes (108) to distribute isochronous payload among nodes (104, 108). Precise temporal information is distributed throughout the fabric (100) in slots (312) to identify isochronous payload by the payload's occurrence in a particular place and time. The cycle master (104) distributes a unique symbol called a mark (304) to each destination node (108). The mark (304) identifies the beginning of an isochronous cycle (300) to each destination node (108) which receives the mark (304). The cycle master (104) distributes isochronous symbols (312) which provides the isochronous payload information to the destination node (108). The distribution of slots (312) in combination with a mark symbol (304) allows each node to determine the local time at any given time by counting the number of slots (312) received after the last mark (304) received. The cycle master (104) also distributes gap symbols (320) to the destination nodes (108), which allow the destination nodes (108) to maintain a uniform throughput throughout the fabric (100) regardless of the transmission capacity of each node (104, 108).

Abstract translation: 公开了一种交换结构（100），其中循环主节点（104）耦合到目的地节点（108）以在节点（104,108）之间分发等时有效载荷。 精确时间信息在时隙（312）中分布在整个结构（100）上，以通过有效载荷在特定地点和时间的出现来识别同步有效载荷。 循环主机（104）将称为标记（304）的唯一符号分配给每个目的地节点（108）。 标记（304）识别接收标记（304）的每个目的地节点（108）的同步周期（300）的开始。 循环主机（104）向同步码元（312）分配，其将同步有效载荷信息提供给目的地节点（108）。 与标记符号（304）组合的时隙（312）的分布允许每个节点通过对接收到的最后标记（304）之后接收的时隙数（312）进行计数来确定在任何给定时间的本地时间。 循环主机（104）还将间隙符号（320）分配给目的地节点（108），其允许目的地节点（108）在整个结构（100）上维持均匀的吞吐量，而不管每个节点（104）的传输容量如何 ，108）。

公开(公告)号：WO0197435A2

公开(公告)日：2001-12-20

申请号：PCT/US0119102

申请日：2001-06-15

Applicant: TYCOM INC

Inventor： EAVES JOHN

IPC: H04J3/07 ,  H04J3/16 ,  H04Q11/04 ,  H04L

CPC classification number: H04J3/1611 ,  H04J3/07 ,  H04J3/076 ,  H04J2203/0089

Abstract: A method and apparatus for mapping digital data signals in an optical communication system to a data structure having a fixed frame size. A justification indicator and a negative stuff location are allocated in frame overhead to accommodate positive/negative/zero justification. A multiplexing method to establish a hierarchy of such data structures using the same technique is also described.

Abstract translation: 一种用于将光通信系统中的数字数据信号映射到具有固定帧大小的数据结构的方法和装置。 在帧开销中分配对齐指示符和负填充位置以适应正/负/零调整。 还描述了使用相同技术建立这种数据结构的层次的复用方法。

公开(公告)号：WO01089119A2

公开(公告)日：2001-11-22

申请号：PCT/US2001/015950

申请日：2001-05-15

IPC: H04B10/18 ,  H04J1/08 ,  H04J1/14 ,  H04J3/06 ,  H04J3/07 ,  H04J14/02 ,  H04L5/06 ,  H04L29/12 ,  H04J

CPC classification number: B82Y15/00 ,  H04B10/2513 ,  H04B10/2569 ,  H04J1/08 ,  H04J1/14 ,  H04J3/0685 ,  H04J3/07 ,  H04J14/0298 ,  H04L5/06 ,  H04L29/12207 ,  H04L61/20

Abstract: In an optical communication network, a variable rate or non-uniform input rate signal is converted to a "pseudo" signal comprising a uniform or standard data rate for the optical communication system. At the receiver, the original non-uniform rate signal is recovered. Non-uniform signals do not have data rates compatible with the standard transmission rate or rates of the transmission system in which they are to be transmitted. In one version, a "pseudo" signal is generated comprising a data transmission frame format including a payload portion comprising a plurality of subpackets comprising data of the original input signal, and stuff bytes, the stuff bytes comprising null data to fill unused parts of the payload portion.

Abstract translation: 在光通信网络中，可变速率或非均匀输入速率信号被转换为包括用于光通信系统的统一或标准数据速率的“伪”信号。 在接收机处，恢复原始的非均匀速率信号。 不均匀信号的数据速率与传输系统的标准传输速率或速率不兼容。 在一个版本中，生成包括数据传输帧格式的数据传输帧格式的数据传输帧格式，该数据传输帧格式包括包括包括原始输入信号的数据的多个子分组的填充部分和填充字节，填充字节包括空数据以填充 有效载荷部分。

公开(公告)号：WO00028683A2

公开(公告)日：2000-05-18

申请号：PCT/US1999/026486

申请日：1999-11-09

IPC: H04J3/06 ,  H04J3/07 ,  H04Q11/04 ,  H04J3/00

CPC classification number: H04Q11/0421 ,  H04J3/0602 ,  H04J3/0647 ,  H04J3/0658 ,  H04J3/0685 ,  H04J3/07 ,  H04L12/403 ,  H04L12/6418

Abstract: A switch fabric (100) is disclosed in which a cycle master node (104) is coupled to destination nodes (108) to distribute isochronous payload among nodes (104, 108). Precise temporal information is distributed throughout the fabric (100) in slots (312) to identify isochronous payload by the payload's occurrence in a particular place and time. The cycle master (104) distributes a unique symbol called a mark (304) to each destination node (108). The mark (304) identifies the beginning of an isochronous cycle (300) to each destination node (108) which receives the mark (304). The cycle master (104) distributes isochronous symbols (312) which provides the isochronous payload information to the destination node (108). The distribution of slots (312) in combination with a mark symbol (304) allows each node to determine the local time at any given time by counting the number of slots (312) received after the last mark (304) received. The cycle master (104) also distributes gap symbols (320) to the destination nodes (108), which allow the destination nodes (108) to maintain a uniform throughput throughout the fabric (100) regardless of the transmission capacity of each node (104, 108).

Abstract translation: 公开了一种交换结构（100），其中循环主节点（104）耦合到目的地节点（108）以在节点（104,108）之间分配等时有效载荷。 精确的时间信息在时隙（312）中分布在整个结构（100）处，以通过有效载荷在特定地点和时间的出现来识别同步有效载荷。 循环主机（104）将称为标记（304）的唯一符号分配给每个目的地节点（108）。 标记（304）标识到接收标记（304）的每个目的地节点（108）的同步周期（300）的开始。 循环主机（104）向目的地节点（108）分配提供同步有效载荷信息的等时符号（312）。 与标记符号（304）组合的时隙（312）的分布允许每个节点通过对接收到的最后标记（304）之后接收的时隙数（312）进行计数来确定在任何给定时间的本地时间。 循环主机（104）还将间隙符号（320）分配给目的地节点（108），其允许目的地节点（108）在整个结构（100）上维持均匀的吞吐量，而不管每个节点（104）的传输容量如何 ，108）。

公开(公告)号：WO99055045A1

公开(公告)日：1999-10-28

申请号：PCT/US1998/015409

申请日：1998-07-24

IPC: H04L7/00 ,  H04L12/28 ,  H04L12/42 ,  H04L12/43 ,  H04L12/64 ,  H04Q11/04 ,  H04L12/56

CPC classification number: H04L12/2852 ,  H04J3/07 ,  H04J2203/0026 ,  H04J2203/0044 ,  H04J2203/0046 ,  H04J2203/0071 ,  H04J2203/0073 ,  H04L12/422 ,  H04L12/43 ,  H04L12/6418 ,  H04L2012/6435 ,  H04L2012/6451 ,  H04L2012/6456 ,  H04L2012/6459 ,  H04Q11/0478

Abstract: A dynamic synchronous transfer mode network (10) that comprises two ring topologies (12, 14) having opposite fiber direction. The first dynamic synchronous transfer mode ring topology (12) has a plurality of nodes (60-70) for receiving and transmitting frames. The time slots are dynamically allocated to the nodes (60-70) and the first ring topology (12) is adapted to transmit frames only in a first fiber direction (D1). The second dynamic synchronous transfer mode ring topology (14) also has a plurality of nodes (60-70) in common with the first ring topology (12). The second ring topology (14) only transmits frames in a second direction (D2) that is opposite the first fiber direction (D1).

Abstract translation: 一种动态同步传输模式网络（10），其包括具有相反纤维方向的两个环形拓扑（12,14）。 第一动态同步传输模式环形拓扑（12）具有用于接收和发送帧的多个节点（60-70）。 时隙被动态地分配给节点（60-70），并且第一环形拓扑（12）适于仅在第一光纤方向（D1）发射帧。 第二动态同步传输模式环形拓扑（14）还具有与第一环形拓扑（12）共同的多个节点（60-70）。 第二环形拓扑（14）仅在与第一光纤方向（D1）相反的第二方向（D2）上传送帧。

公开(公告)号：WO1997020405A1

公开(公告)日：1997-06-05

申请号：PCT/DK1996000484

申请日：1996-11-22

Applicant: DSC COMMUNICATIONS A/S ,  NIELSEN, Anders, Boje

Inventor： DSC COMMUNICATIONS A/S

IPC: H04J03/07

CPC classification number: H04J3/07 ,  H04J3/1611 ,  Y10S370/907

Abstract: A data transmission system is used for the transmission of a large number of telephone channels between nodes in a transmission network built as a Synchronous Digital Hierarchy (SDH), where a pulse frame (e.g. STM-1) contains a large number of bytes, each of which can be used for the transmission of a telephone channel or of overhead signals for the administration of the system, and where signals from a Plesiochronous Digital Hierarchy (PDH) are introduced into the pulse frame of the Synchronous Digital Hierarchy, so that the signals from the Plesiochronous Digital Hierarchy when introduced do not occupy all the bytes in said pulse frame. At least some of the bytes of the pulse frame which are not occupied by said introduction, are used for the transmission of user-specified data signals. A method of transmitting user-specified data signals in such a transmission network comprises transmitting the user-specified data signals in one or more if the bytes in the pulse frame which are not occupied by the introduction of the PDH signals into the SDH.

Abstract translation: 数据传输系统被用于传输建立在同步数字体系（SDH）的传输网络中的节点之间的大量电话信道，其中脉冲帧（例如，STM-1）包含大量字节，每个 可以用于传输电话信道或用于管理系统的开销信号，并且其中来自同步数字体系（PDH）的信号被引入到同步数字体系的脉冲帧中，使得信号 来自Plesiochronous Digital Hierarchy的引用不占用所述脉冲帧中的所有字节。 脉冲帧的至少一些未被所述引入占用的字节用于传输用户指定的数据信号。 在这样的传输网络中发送用户指定的数据信号的方法包括：如果脉冲帧中不被引入PDH信号的字节进入SDH，则将用户指定的数据信号发送到一个或多个。