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公开(公告)号：WO2022253287A1
公开(公告)日：2022-12-08
申请号：PCT/CN2022/096725
申请日：2022-06-02
Applicant: 寒武纪（西安）集成电路有限公司
IPC: G06F7/58
Abstract: 本披露公开了一种用于生成随机数的装置、集成电路芯片、板卡、电子设备和用于生成随机数的方法。其中前述的装置可以包括在组合处理装置中，该组合处理装置还可以包括接口装置和其他处理装置。所述计算装置与其他处理装置进行交互，共同完成用户指定的计算操作。组合处理装置还可以包括存储装置，该存储装置分别与设备和其他处理装置连接，用于存储该设备和其他处理装置的数据。本披露的方案可以提升随机数的生成效率，并且增加硬件执行的流水性能。
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公开(公告)号：WO2022248117A1
公开(公告)日：2022-12-01
申请号：PCT/EP2022/059906
申请日：2022-04-13
Applicant: KAPSLOG
Inventor： SIMON, Peter Roger
IPC: G06F7/58
Abstract: Ce procédé est mis en œuvre au sein d'un processeur numérique par : a) interrogation d'un registre interne (R1... R(n)) du processeur dont le contenu (b(n)... b0) se modifie au cours du temps; b) extraction à un instant donné de n bits du registre, n ≥ 1; c) utilisation des n bits extraits en tant que bit(s) constitutif(s) d'un nombre aléatoire de N bits à générer; d) réitération (250) des étapes a) à c) jusqu'à obtention des N bits du nombre aléatoire; et e) délivrance du nombre aléatoire à un circuit ou logiciel applicatifs. Pour introduire une part d'aléa supplémentaire, le procédé comprend en outre, une sélection par un processus aléatoire ou pseudo-aléatoire (240) de ceux des n bits du registre qui seront extraits, et/ou de sélection par un processus aléatoire ou pseudo-aléatoire (230) de l'un d'entre une pluralité de registres internes (R1... R(n)) potentiellement interrogeables du processeur, et sélection des n bits du registre sélectionné, notamment sélection par un processus aléatoire ou pseudo-aléatoire de l'un au moins des bits du registre sélectionné.
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公开(公告)号：WO2022225451A1
公开(公告)日：2022-10-27
申请号：PCT/SG2022/050195
申请日：2022-04-05
Applicant: NATIONAL UNIVERSITY OF SINGAPORE
Inventor： PRIMAATMAJA, Ignatius William , LIM, Ci Wen , GOH, Koon Tong
Abstract: A method for providing a semi-device-independent random output signal, and a system for providing a semi-device-independent random output signal. The method comprises the steps of providing respective coherent laser signals of a same optical mode in a signal arm and a local oscillator arm between a quantum signal source, Alice, and at a quantum signal detector, Bob; Alice and Bob randomly selecting operation in a test mode or a randomness generation mode for each of n rounds; generating a raw random string from bit values bi of rounds in which randomness generation mode was chosen, and using rounds in which test mode was chosen to estimate an entropy of the raw random string.
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公开(公告)号：WO2022215868A1
公开(公告)日：2022-10-13
申请号：PCT/KR2022/002997
申请日：2022-03-03
Applicant: 삼성전자 주식회사
Abstract: 다양한 실시예에 따른 전자 장치는, 제1난수생성 모듈, 제2난수생성 모듈, 난수 데이터를 저장하는 버퍼 메모리, 및 상기 제1난수생성 모듈, 상기 제2난수생성 모듈, 및 상기 버퍼 메모리와 작동적으로(operatively) 연결되어 작동하는 프로세서를 포함하고, 상기 프로세서는, 상기 제1난수생성 모듈로부터 제1난수열을 획득하여 상기 버퍼 메모리에 저장하고, 상기 제2난수생성 모듈로부터 획득한 제2난수열에 기초하여 상기 제1난수열을 변경한 제3난수열을 생성하고, 상기 제3난수열에 기초하여 암호키를 생성할 수 있다. 그 외에 다양한 실시예가 가능하다.
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公开(公告)号：WO2022167945A1
公开(公告)日：2022-08-11
申请号：PCT/IB2022/050895
申请日：2022-02-02
Applicant: GSI TECHNOLOGY INC.
Inventor： ILAN, Dan
Abstract: A system for parallel combinatorial design includes a processor, an in-memory vector processor and a storage unit. The processor includes a seed generator, a Cspan generator and a rule checker. The seed generator generates at least one seed to generate combinations of length N, defining a space of N choices of which M choices are to be selected. The Cspan generator generates at least one combination from the at least one seed and stores each combination in a separate column of the in-memory vector processor. The rule checker performs a parallel search at least in the in-memory vector processor for combinations which satisfy a rule and the storage unit receives search results of the rule checker from the in-memory vector processor.
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Patent Agency Ranking6.发明申请
公开(公告)号：WO2022101812A1
公开(公告)日：2022-05-19
申请号：PCT/IB2021/060431
申请日：2021-11-11
Applicant: EQUAL1.LABS INC.
Inventor： REDMOND, David J. , LEIPOLD, Dirk Robert Walter , BASHIR, Imran , STASZEWSKI, Robert Bogdan
Abstract: A novel and useful system and method of quantum stochastic rounding using silicon based quantum dot arrays. Unitary noise is derived from a probability of detecting a particle within a quantum dot array structure comprising position based charge qubits with two time independent basis states |0> and |1>. A two level electron tunneling device such as an interface device, qubit or other quantum structure is used to generate quantum noise. The electron tunneling device includes a reservoir of particles, a quantum dot, and a barrier that is used to control tunneling between the reservoir and the quantum dot. A detector circuit connected to the device outputs a digital stream corresponding to the probability of a particle of being detected. Controlling the bias applied to the barrier controls the probability of detection. Thus, the probability density function (PDF) of the output unitary noise can be controlled to correspond to a desired probability. The unitary noise is used to perform stochastic rounding by controlling the bias applied to the barrier in accordance with a remainder of numbers to be rounded.
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公开(公告)号：WO2022098490A1
公开(公告)日：2022-05-12
申请号：PCT/US2021/055277
申请日：2021-10-15
Applicant: ADVANCED MICRO DEVICES, INC.
Inventor： KAPLAN, David , MOYER, Paul
IPC: G06F7/58
Abstract: A computing system may implement a split random number generator that may use a random number generator to generate and store seed values in a memory for retrieval and use by one or more core processors to generate random numbers for secure processes within each core processor.
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公开(公告)号：WO2022088140A1
公开(公告)日：2022-05-05
申请号：PCT/CN2020/125656
申请日：2020-10-31
Applicant: 华为技术有限公司
IPC: G06F7/58
Abstract: 一种人工智能AI芯片（200）和邻接表采样方法。其中，AI芯片（200）包括随机数生成器（201）和NPU（202）；随机数生成器（201），用于生成K个随机数；NPU（202），用于对输入到的第一邻接表进行行列转置，得到第二邻接表，第一邻接表的规模为M*N，第二邻接表的规模为N*M；根据K个随机数对第二邻接表进行乱序重排，以得到第三邻接表，第三邻接表的规模为K*M；根据第三邻接表得到目标邻接表，目标邻接表的规模为M*S，S为小于N的整数。基于AI芯片（200）结构的特点，重新设计了邻接表采样流程，降低了计算耗时和内存开销。
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公开(公告)号：WO2022052405A1
公开(公告)日：2022-03-17
申请号：PCT/CN2021/073443
申请日：2021-01-23
Applicant: 苏州浪潮智能科技有限公司
Abstract: 一种量子数据擦除的方法、系统、设备及可读存储介质，所述方法包括：获取等概率量子态体系；对等概率量子态体系进行测量，以使等概率量子态体系坍缩为二进制随机数列；根据二进制随机数列生成对应的随机角度值；根据随机角度值对量子设备中的量子数据进行按位旋转操作，完成此次量子数据擦除。本申请引入了量子真随机数，可以确保擦除后的数据不会被恢复，且不会被反向破解，对保护数据资产具有重要价值；同时，随机处理后的数据仍具有量子相干、量子纠缠等特性，可以在后续继续使用，避免了每次都要重新制备量子系统的耗时耗力过程。
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公开(公告)号：WO2022039671A1
公开(公告)日：2022-02-24
申请号：PCT/SG2021/050474
申请日：2021-08-13
Applicant: NATIONAL UNIVERSITY OF SINGAPORE
Inventor： TANEJA, Sachin , ALIOTO, Massimo
Abstract: A method of generating true random numbers for use by a cryptographic hardware component for cryptographic algorithms or communication protocols, and a cryptographic hardware component for cryptographic algorithms or communication protocols. The method comprises the steps of controlling a clock pulsewidth, PW, for pulsed-latch clocking in the cryptographic hardware component to switch between using the cryptographic hardware component to generate the true random numbers in a first operating state; and using the cryptographic hardware component for cryptographic processing in a second operating state.
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