公开(公告)号：WO2021154881A1

公开(公告)日：2021-08-05

申请号：PCT/US2021/015326

申请日：2021-01-27

申请人： QUALCOMM INCORPORATED

发明人： YADAV, Kshitij

IPC分类号： G05F1/46 ,  G05F3/00 ,  G11C5/14 ,  H03M1/10 ,  H03K19/00 ,  H03K19/0185

摘要： Certain aspects of the present disclosure provide circuitry connecting an output of voltage reference circuitry powered by a relatively high voltage to an input of a voltage buffer configured to generate a voltage lower than the high voltage. The connecting circuitry prevents the high voltage from reaching the input of the voltage buffer. One example electronic circuit generally includes a voltage reference circuit configured to be powered by a relatively higher voltage, a buffer circuit configured to generate a relatively lower voltage as compared to the relatively higher voltage, and circuitry coupled between an output of the voltage reference circuit and an input of the buffer circuit, the circuity being configured to prevent the higher voltage from reaching the input of the buffer circuit.

公开(公告)号：WO2011017057A2

公开(公告)日：2011-02-10

申请号：PCT/US2010/043257

申请日：2010-07-26

申请人： AEQUITAS INNOVATION

发明人： KRUEST, James, Robert ,  ATKINSON, Paul

IPC分类号： G05F3/00 ,  G05F3/24 ,  G06K19/07

CPC分类号： G06K7/0008 ,  G06K7/10128 ,  G06K19/07749

摘要： A wireless control device is described that single chip passive wireless control integrated circuit device. The device is coupled to an antenna configured to receive a radio signal and comprises a radio frequency transceiver circuit fabricated on a semiconductor substrate of an integrated circuit device and configured to extract information from the radio signal and a processor fabricated on the semiconductor substrate and configured to receive the information extracted from the radio signal and to respond to a command encoded in the information. A FET fabricated on the substrate operates as a switch and has a gate controlled by the processor. The FET can be configured to transmit an activation current provided to the integrated circuit device to an output of the integrated circuit device. The output may drive an actuator.

摘要翻译： 无线控制装置被描述为单芯片无源无线控制集成电路装置。 该装置耦合到被配置为接收无线电信号的天线，并且包括在集成电路装置的半导体衬底上制造的射频收发器电路，并且被配置为从无线电信号提取信息，以及制造在半导体衬底上的处理器， 接收从无线电信号中提取的信息并响应在信息中编码的命令。 在衬底上制造的FET用作开关并具有由处理器控制的栅极。 FET可以被配置为将提供给集成电路器件的激活电流传输到集成电路器件的输出。 输出可以驱动执行器。

公开(公告)号：WO2011011503A2

公开(公告)日：2011-01-27

申请号：PCT/US2010/042729

申请日：2010-07-21

申请人： INTERSIL AMERICAS INC. ,  WANG, Jue

发明人： WANG, Jue

IPC分类号： G05F1/10 ,  G05F3/00

CPC分类号： H02M3/1588 ,  H03K2217/0081 ,  Y02B70/1466

摘要： An apparatus comprises a voltage regulator including an high side switching transistor and a low side switching transistor. A high side drive controls operation of the high side switching transistor. A low side driver controls operation of the low side switching transistor. A bootstrap capacitor provides an operating voltage to the high side switching driver. The bootstrap capacitor is charged to a predetermined level responsive to a supply voltage. A low side driver drives the low side switching transistor according to a process that charges the bootstrap capacitor to the predetermined level. The process turns on the low side switching transistor for a first predetermined number of cycles and turns off the low side switching transistor for a second predetermined number of cycles. The process is repeated for a predetermined number of times during startup of the voltage regulator when a prebias load is applied to the voltage regulator.

摘要翻译： 一种装置包括电压调节器，该电压调节器包括高侧开关晶体管和低侧开关晶体管。 高端驱动器控制高端开关晶体管的操作。 低端驱动器控制低端开关晶体管的操作。 自举电容器向高端开关驱动器提供工作电压。 响应于电源电压，自举电容器被充电到预定电平。 低侧驱动器根据将自举电容器充电至预定电平的过程来驱动低侧开关晶体管。 该过程使低侧开关晶体管导通第一预定数量的周期并关断低侧开关晶体管第二预定数量的周期。 在向电压调节器施加预偏置负载时，在电压调节器启动期间重复该过程预定次数。

公开(公告)号：WO2006127844A3

公开(公告)日：2007-12-13

申请号：PCT/US2006020140

申请日：2006-05-24

申请人： SATCON TECHNOLOGY CORP ,  RAJDA JANOS ,  GALBRAITH ANTHONY WILLIAM ,  SCHAUDER COLIN DAVID

发明人： RAJDA JANOS ,  GALBRAITH ANTHONY WILLIAM ,  SCHAUDER COLIN DAVID

IPC分类号： G05F1/70 ,  G05F3/00 ,  G05F5/00 ,  G05F5/06

CPC分类号： G05F1/70 ,  F03D9/257 ,  H02P9/102 ,  H02P2101/15 ,  Y02E10/72

摘要： A device, a system, and a method for preventing power- producing wind turbine generators(22) from tripping due to the detection of a low-voltage condition on a power grid (27) are disclosed.The disclosed device includes a resistor bank(35c) that absorbs real power and a control system that maintains the collector bus voltage (26) above a threshold voltage level during the duration of low-voltage condition on the power grid. Collector bus voltage (26) is maintained using gating signals that include phase delay angles to adjust the opening/closing of the switching devices.

摘要翻译： 公开了一种用于防止由于电网（27）上的低电压状况的检测而产生电力的风力涡轮发电机（22）跳闸的装置，系统和方法。所公开的装置包括电阻器组 35c），其在电力网的低电压状态期间将集电极母线电压（26）维持在阈值电压电平以上的控制系统。 使用包括相位延迟角度的门控信号来维持集电极母线电压（26），以调节开关装置的开/关。

公开(公告)号：WO2007117382A1

公开(公告)日：2007-10-18

申请号：PCT/US2007/007648

申请日：2007-03-27

申请人： SANDISK CORPORATION ,  PAN, Feng ,  GOVINDU, Prashanti

发明人： PAN, Feng ,  GOVINDU, Prashanti

IPC分类号： G05F3/00

CPC分类号： H02M3/073 ,  H02M2001/0025 ,  H02M2001/0032 ,  H02M2001/0048 ,  Y02B70/1491 ,  Y02B70/16

摘要： A high voltage device is connected in a voltage divider and couples a regulated voltage to a comparator for voltage regulation. The high voltage device is biased to conduct a current during regulator operation. When regulator operation is terminated, a switch in the voltage divider is opened to terminate current flow in the voltage divider. While the regulated output voltage can be coupled to the high voltage device when the switch is opened, the device node coupled to the comparator remains at a voltage level determined by the device bias voltage and the turn on voltage, V T , of the device, or V bias -V T , when the switch is opened. In one embodiment, the high voltage device comprises a field effect transistor having sufficient width to accommodate the voltage drop across the source and drain.

摘要翻译： 高压器件连接在分压器中，并将稳压电压耦合到比较器进行电压调节。 在调节器运行期间，高电压装置被偏置以导通电流。 当调节器操作终止时，分压器中的开关打开以终止分压器中的电流。 当开关断开时，稳压输出电压可耦合到高压器件，耦合到比较器的器件节点保持在由器件偏置电压和导通电压V T确定的电压电平， SUB>，或者V bias -V T ，当开关打开时。 在一个实施例中，高电压装置包括具有足够宽度的场效应晶体管，以适应源极和漏极两端的电压降。

公开(公告)号：WO00002110A2

公开(公告)日：2000-01-13

申请号：PCT/FI1999/000553

申请日：1999-06-22

IPC分类号： G01R19/22 ,  G05F3/00 ,  H01L41/00

CPC分类号： G01R19/22

摘要： The invention relates to a DC and an AC voltage reference system as well as an AC/DC converter. According to the invention, said AC voltage reference system comprises at least one micromechanically fabricated electrode pair (7, 8) that further includes a first electrode (7) and a second electrode (8) adapted facing each other so that the electrodes are disposed at a distance from each other, whereby at least one of said electrodes (7) is made movable against a spring force, and said system further including means for applying an AC signal (2, 3) over said electrodes (7, 8) for establishing an electrostatic force advantageously at a frequency which is substantially higher than the effective mechanical resonant frequency of the movable electrode (7); and said system further includes apparatus (DVM1, DVM2) for detecting the AC voltage (V?out?) applied between said electrodes (7, 8), thus forming an AC voltage reference.

摘要翻译： 本发明涉及DC和AC电压参考系以及AC / DC转换器。 根据本发明，所述AC电压参考系统包括至少一个微机械制造的电极对（7,8），其还包括彼此面对的第一电极（7）和第二电极（8），使得电极设置在 彼此间隔开距离，由此所述电极（7）中的至少一个能够克服弹簧力而移动，并且所述系统还包括用于在所述电极（7,8）上施加AC信号（2,3）的装置，用于建立 有利地具有基本上高于可动电极（7）的有效机械共振频率的频率的静电力; 并且所述系统还包括用于检测施加在所述电极（7,8）之间的AC电压（V out out）的装置（DVM1，DVM2），从而形成AC电压基准。

公开(公告)号：WO2017015178A1

公开(公告)日：2017-01-26

申请号：PCT/US2016/042711

申请日：2016-07-18

申请人： BOSE CORPORATION

发明人： YAMKOVOY, Paul G. ,  RUWE, Matthew Neil

IPC分类号： H02M1/36 ,  G05F3/00 ,  H02M3/156

CPC分类号： H02M3/158 ,  G05F3/00 ,  H02M1/36 ,  H02M3/156 ,  H04R1/1041 ,  H04R2460/01

摘要： A circuit includes an input for receiving power from an external power supply, a voltage regulator coupled to the power input and providing regulated voltage to an external circuit and to the power supply control circuit itself, and a first switch coupled between ground and an Enable input of the voltage regulator. A control input of the first switch is coupled to the regulated voltage, such that when the voltage regulator provides regulated voltage, the first switch is closed, coupling the Enable input to ground, keeping the voltage regulator active. A first switching circuit provides manual activation and deactivation of the voltage regulator; a second switching circuit provides automatic activation of the voltage regulator whenever the power input becomes powered. An intervening circuit prevents the second switching circuit from activating the voltage regulator when the first switching circuit has deactivated it, despite the continued presence of the external power supply.

摘要翻译： 电路包括用于从外部电源接收电力的输入端，耦合到电力输入端的电压调节器，并向外部电路和电源控制电路本身提供调节电压，以及耦合在地和使能输入端之间的第一开关 的电压调节器。 第一开关的控制输入耦合到调节电压，使得当电压调节器提供调节电压时，第一开关闭合，将使能输入耦合到地，保持电压调节器有效。 第一开关电路提供手动激活和去激活电压调节器; 只要电源输入变为电源，第二开关电路就提供电压调节器的自动启动。 尽管持续存在外部电源，但是当第一开关电路已经停用时，中间电路防止第二开关电路激活电压调节器。

公开(公告)号：WO2013086242A1

公开(公告)日：2013-06-13

申请号：PCT/US2012/068316

申请日：2012-12-06

申请人： VARENTEC, INC.

发明人： DIVAN, Deepakraj ,  PRASAI, Anish

IPC分类号： G05F3/00

CPC分类号： H02J3/16 ,  H02J3/1835 ,  Y02E40/34

摘要： Systems and methods for harmonic resonance control are described. In some embodiments, a system comprises a first switch-controlled VAR source and a harmonic management block which may each be configured to be coupled to a distribution power network. The first switch-controlled VAR source may comprise a first processor, a voltage compensation component, and a switch. The first processor may be configured to enable the voltage compensation component after a delay by controlling the switch based on first proximate voltage after a duration associated with the delay to adjust voltage volt-ampere reactive. The harmonic management block may be configured to compare a second proximate voltage to at least one resonant threshold to detect potential resonance caused by enablement of the voltage compensation component and to engage based on the comparison the resonance compensation component to manage the potential resonance.

摘要翻译： 描述谐波共振控制的系统和方法。 在一些实施例中，系统包括第一开关控制的VAR源和谐波管理块，其可以被配置为耦合到分配电力网络。 第一开关控制的VAR源可以包括第一处理器，电压补偿部件和开关。 第一处理器可以被配置为通过在与延迟相关联的持续时间之后基于第一接近电压控制开关来在延迟之后启用电压补偿分量，以调整电压伏安反应。 谐波管理块可以被配置为将第二邻近电压与至少一个谐振阈值进行比较，以检测通过启用电压补偿组件而引起的电位谐振，并且基于比较谐振补偿分量来控制潜在共振。

公开(公告)号：WO2012172390A1

公开(公告)日：2012-12-20

申请号：PCT/IB2011/052602

申请日：2011-06-15

申请人： FREESCALE SEMICONDUCTOR, INC. ,  SOFER, Sergey ,  NEIMAN, Valery ,  PRIEL, Michael

发明人： SOFER, Sergey ,  NEIMAN, Valery ,  PRIEL, Michael

IPC分类号： G05F3/00 ,  G05F1/565

CPC分类号： H03K17/6871 ,  G06F1/26

摘要： An integrated circuit device (200) comprises at least one power gating arrangement (205). The at least one power gating arrangement (205) comprises at least one gated power domain (210), and at least one power gating component (220) operably coupled between at least one node (215) of the at least one gated power domain (210) and at least a first power supply node (202). The at least one power gating component (220) is arranged to selectively couple the at least one node (215) of the at least one gated power domain (210) to the at least first power supply node (202). The at least one power gating arrangement (205) further comprises at least one isolation component (240) operably coupled, for example in series, between at least one chargeable device, for example a capacitance (230) and the at least one node (215) of the at least one gated power domain (210), the at least one isolation component (240) being arranged to selectively couple the at least one capacitance (230) to the at least one node (215) of the at least one gated power domain (210).

摘要翻译： 集成电路装置（200）包括至少一个电源门控装置（205）。 所述至少一个电源选通装置（205）包括至少一个门控功率域（210），以及至少一个电源门控组件（220），其可操作地耦合在所述至少一个选通电力域的至少一个节点（215） 210）和至少第一电源节点（202）。 至少一个电源门控组件（220）被布置成选择性地将至少一个门控功率域（210）的至少一个节点（215）耦合到至少第一电源节点（202）。 至少一个电源门控装置（205）还包括至少一个隔离部件（240），其可操作地耦合到例如串联的至少一个可充电装置，例如电容（230）和至少一个节点（215）之间 ）至少一个门控功率域（210）的至少一个节点（210），所述至少一个隔离组件（240）被布置成选择性地将所述至少一个电容（230）耦合到所述至少一个门控 功率域（210）。

公开(公告)号：WO2008085781B1

公开(公告)日：2008-10-09

申请号：PCT/US2007089119

申请日：2007-12-28

申请人： ATMEL CORP ,  PELLI GABRIELE ,  LORENZO BEDARIDA ,  MASSIMILIANO FRULIO ,  BETTINI ANDREA

发明人： PELLI GABRIELE ,  LORENZO BEDARIDA ,  MASSIMILIANO FRULIO ,  BETTINI ANDREA

IPC分类号： G05F3/26 ,  G05F3/00

CPC分类号： H03F3/343 ,  G09G3/20 ,  G09G3/3216 ,  G09G3/3225

摘要： A current mirror circuit includes a first current-mirror transistor coupled to a second current- mirror transistor. A load is coupled to the second current-mirror transistor. A first current source is coupled to the first current-mirror transistor to cause a bias current to flow through the first current-mirror transistor and a second current source is coupled to the second current- mirror transistor and in parallel with the load to shunt the bias current away from the load.

摘要翻译： 电流镜电路包括耦合到第二电流镜晶体管的第一电流镜晶体管。 负载耦合到第二电流镜晶体管。 第一电流源耦合到第一电流镜晶体管，以使偏置电流流过第一电流镜晶体管，并且第二电流源耦合到第二电流镜晶体管并与负载并联以分流 偏置电流远离负载。