Abstract:
A circuit (200) includes a four-terminal voltage controlled voltage source (VCVS, 201) coupled to a three-terminal amplifying device (203), whereby when an input signal is applied to a negative input terminal (205) of the VCVS (201), the circuit (200) operates in a manner substantially complementary to the amplifying device (203). Such a circuit (200) may be considered a "virtual" three-terminal amplifying device and may be beneficially coupled in a complementary manner with another three-terminal amplifying device that is substantially identical to the three-terminal amplifying device (203) included in the circuit (200) to form a composite amplifier circuit that achieves intended performance over varying operating conditions.
Abstract:
An output buffer (320) incorporating a compensation circuit (370) and a predriver (310) and having compensated slew rates which are compensated against process variations is provided. The predriver (310) comprises an amplifier (250) and a transistor (240) having a gate coupled to an output of the amplifier.
Abstract:
In a integrated circuit, a mirrored current is fed to a high-impedance output node. A load is connected to the output node, and a returned current is proportional to or equal to the current supplied from a reference current source. The integrated circuit or current mirror circuit is provided with a pair of output transistors connected in series between the output node and a reference terminal. The channel of one of the output transistors is short so that the threshold voltage may be lower than that of the other transistor having a long channel. Thus, the transistors are the outcome of the high-density integrated-circuit fabrication method, and more specifically, a short-channel effect produced by a channel length of 1 mu m or less is exploited. The difference between the threshold voltages of the pair of output transistors and mutual connection between the gates of the transistors lead to minimization of the operating voltage of a current mirror circuit and maximization of the output impedance and the output swing from the output terminal of the current mirror circuit.
Abstract:
A one-shot current circuit which generates a current for a desired period, the desired period being inversely proportional to the edge rate of an input signal. The circuit includes a MOS transistor device which selectively conducts current between an input terminal and a current generating circuit. The current generating circuit can be bipolar transistor having its base coupled to the input terminal and a main current path between a circuit output and a supply voltage.
Abstract:
An improved circuit for coupling the output of a photodetector in a focal plane array to a charge coupled device. The improvement comprises amplifier means coupled between the gate of the photodetector output and an output FET for lowering the overall circuit impedance, for reducing the effect of photodetector and FET nonuniformities on the output current and for reducing the size of resistive circuit components. The amplifier may use a cascade of gate modulated FETs, at least one of which is source coupled to the photodetector output, to enhance circuit performance. The amplifiers' gain and impedance may be selectively varied by adjusting a single bias voltage.
Abstract:
Methods and devices for speeding up the onset of a target current through an output leg of a current mirror are presented. Upon activation of the current mirror, a pre-charge current is sourced to a node of the current mirror that is common to the output leg and an input leg of the current mirror. Sourcing of the pre-charge current is based on sensing, by a first transistor, of a voltage at the common node. Pre-charging of the common node continues up to a cutoff voltage sensed at the common node. Sourcing of the pre-charge current is provided by a second transistor coupled to the common node. Based on the voltage sensed at the common node, the first transistor controls the sourcing of the pre-charge current by the second transistor. Such control is based on a portion of a current from a current source that flows through the first transistor.
Abstract:
The present invention relates generally to the field of electret capsule, and more particularly to a circuit configuration of an impedance converter integrated in an electret capsule such as for use in condenser microphones. The electret capsule of a microphone may include a gate biasing field effect transistor (FET) to facilitate biasing of a low noise FET. Advantageously, the use of low noise FET in the electret capsule of a microphone provides for a reduced cost, while achieving lower self-noise.