US07689179B2
Provided are an amplifier section in which N amplifiers (N is an integer of 2 or more) are serially connected to one another, and which performs an amplitude modulation on an input signal using an amplitude signal, which is a control signal; and M distortion compensation apparatuses (M is a natural number satisfying M
US07689174B2
An integrated circuit (IC) includes a baseband processing module, a GPS receiver, an RF section, and an interface module. The GPS receiver module is coupled to recover a plurality of coarse/acquisition (C/A) signals and a plurality of navigation messages from a plurality of down converted GPS signals. The RF section is coupled to convert an inbound RF voice signal into the inbound voice symbol stream; convert the outbound voice symbol stream into an outbound RF voice signal; convert an inbound RF data signal into the inbound data symbol stream; convert the outbound data symbol stream into an outbound RF data signal; and convert a plurality of GPS RF signals into the plurality of down converted GPS signals.
US07689159B2
A sheet transport apparatus includes a pair of rollers for transporting a sheet and a sheet detection device for detecting the sheet transported by the pair of rollers. The sheet detection device includes a flag that is displaceable when urged by the sheet transported by the pair of rollers and a single-chip acceleration sensor attached to the flag to detect the arrival of the sheet. When the sheet is brought into contact with the flag to rotate the flag, the acceleration sensor detects the roll acceleration of the flag so as to determine the timing of stopping the pair of rollers on the basis of a detection signal.
US07689158B2
An image forming apparatus includes an apparatus main body and an original reading device disposed on top of the apparatus main body. A sheet supply cassette, a sheet discharge tray, an original feed tray, and the original discharge tray are oriented such that their lengthwise directions are aligned with the first horizontal direction, and are arranged to overlap with one another in the vertical direction. A pair of side walls is disposed at both widthwise ends of the sheet supply cassette, the sheet discharge tray, the original feed tray, and the original discharge tray. The both widthwise ends of these components are formed as edge portions. The pair of side walls covers an entire length of each of the edge portions, thereby supporting all of the sheet supply cassette, the sheet discharge tray, the original feed tray, and the original discharge tray.
US07689154B2
An image forming apparatus includes a toner image forming section, an image carrying section, a transferring section, a recording material conveying section, a heat fixing section, a wet fixing section, and a recording material supply section. In the image forming apparatus, a surface temperature of fixing roller in the heat fixing section is detected by a temperature sensor and according to a detected result, the recording material conveying section selects either one of the heat fixing section and the wet fixing section as a conveyance destination for a recording material carrying an unfixed toner image.
US07689152B2
An image forming apparatus may include a first transfer section for transferring a toner image, formed on an image carrier by utilizing a charging section, an exposing section and a developing section, onto a belt shaped intermediate transfer member; and a second transfer section for transferring the toner image on the intermediate transfer member onto a recording material by applying an electric field between a second transfer roller being provided outside the intermediate transfer member and a backup roller being provided inside the intermediate transfer member, the second transfer roller and the backup roller sandwiching the intermediate recording member and the recording material. The second transfer roller may be grounded and a bias voltage may be applied to the backup roller, and a second charging section for charging a surface of the second transfer roller with a predetermined polarity may be included.
US07689151B2
A multi-color image-forming apparatus having image-forming sections for a plurality of different colors can include an optical sensor having a light-casting section that casts single polarized light and a light-receiving section that receives polarized light different from the cast light. A pattern for detecting toner positions can be used in which toner having high reflectance to a particular light emission wavelength is independently formed. In addition, other patterns in which toner having low reflectance to the particular light emission wavelength are partially formed on a central portion of the pattern of high reflection toner by using the high reflection toner as a foundation. The apparatus can detect each toner pattern by the optical sensor to correct the color shift of each color.
US07689148B2
An image forming apparatus includes a developing unit, a transfer unit, and a photosensitive drum assembly. The drum assembly has a photosensitive drum, a driven section integral with the photosensitive drum, and a driving section which transmits a driving force to the driven section to rotate the photosensitive drum. Either one of the driven section and the driving section comprises a contact face, which constitutes a part of a plane including a rotation axis of the photosensitive drum. The other of the driven section and the driving section comprises a single boss, which is substantially in parallel with the rotation axis and contacts the contact face.
US07689146B2
An electrophotographic image forming apparatus for forming an image on a recording material, to which a process cartridge is detachably mountable, the apparatus, includes (a) a plurality of mounting portions for detachably mounting process cartridges, respectively, the process cartridges each including, an electrophotographic photosensitive drum, a developing roller for developing an electrostatic latent image formed on the electrophotographic photosensitive drum, a developer accommodating portion for accommodating a developer for use by the developing roller to develop the electrostatic latent image, a developer supply opening for supplying the developer to the developing roller from the developer accommodating portion, a sealing member for unsealably sealing the developer supply opening, and unsealing means for unsealing the developer supply opening by removing the sealing member from the developer supply opening; (b) a motor; and (c) driving force transmitting means for selectively transmitting a driving force from the motor to the unsealing means to unseal the developer supply openings of the process cartridges mounted to the mounting portions.
US07689141B2
A reassembled laser printer toner cartridge and method of manufacture including a cartridge seal assembly in which the remains of an OEM laser printer toner cartridge's toner hopper pull seal strip(s) is left in position, or a substitute conductive strip is put in the same position to simulate the OEM pull seal strip(s) if the OEM strips have been damaged or are missing in order to enable a repaired or remanufactured cartridge to cooperate with the printer in detecting measuring and displaying the amount of toner consumed from the cartridge and shut the printer down, once the toner cartridge is empty, and a toner cartridge hopper foam seal strip assembly that covers the remnants of the OEM seal strips and provides a seal to prevent leakage of toner from the re-filled toner cartridge.
US07689140B2
A blade cleaning jig includes a cleaning portion and a gripping portion. The cleaning portion includes a support body of stainless steel or the like and polishing tape provided on the upper face of this support body, and moreover a cushioning material is inserted between the support body and the polishing tape. A protective member for preventing damage to the surface of a developer roller is attached to the entire lower face of the support body. This protective member is attached bent at a circumferential end portion such that the protective member covers from the lower face of the support body via a circumferential edge portion to an upper face circumferential edge portion.
US07689132B2
An interference-rejection coding method for an optical wireless communication system and such an optical wireless communication system are provided. The coding method uses delay modulation, block code techniques and filtering to reduce the low frequency interference from light sources. A plurality of codewords from the block codes are reserved for performing digital data recovery. The invention removes the need of analog clock data recovery circuit, and does not require complex hardware for realization. Therefore, it can be applied to a wide range of applications, such as optical WLAN, data transmission of medical facilities, wireless communication in the aircraft, encrypted data transmission network, and low-priced transmission interfaces.
US07689126B2
A wavelength dispersion compensation control method determining whether a clock component is contained in an optical signal received from an optical transmission path and, if a clock component if contained in the optical signal, extracting the clock component, and stopping control of a variable wavelength dispersion compensator when no clock component is extracted.
US07689125B2
An optical processing method includes: receiving an optical signal from an optical system, wherein the optical signal is distorted by frequency-dependent polarization effects in the optical system; spatially dispersing frequency components of the distorted optical signal on a spatial light modulator (SLM); and independently adjusting the polarization transfer matrix of multiple regions of the SLM to reduce the distortion of the optical signal. A related optical processing method includes: providing a precompensation signal indicative of frequency-dependent polarization effects in a downstream optical system; spatially dispersing frequency components of an optical signal on a spatial light modulator (SLM); and independently adjusting the polarization transfer matrix of multiple regions of the SLM to at least partially precompensate the optical signal for distortions caused by the frequency-dependent polarization effects in the downstream optical system. Another related optical processing method includes: providing a model of the frequency-dependent polarization effects; spatially dispersing frequency components of the optical signal on a spatial light modulator (SLM); and independently adjusting the polarization transfer matrix of multiple regions of the SLM based on the model to emulate the optical signal transmission.
US07689123B2
A method and system includes at least one interconnect hub, connecting the at least one interconnect hub to a plurality of audio connection devices to form a network of audio connection devices with the interconnect hub at the center of the ring. The audio connection devices are connected to each other through the at least one interconnect hub, and data is synchronously transmitted between at least two of the audio connection devices through the at least one interconnect hub.
US07689122B2
A signal detect circuit includes a signal strength measuring differential output linear amplifier. A positive peak detection circuit is coupled to the positive output terminal of the linear amplifier and generates a signal that represents a peak magnitude of a signal received from the positive output terminal. Likewise, a negative peak detection circuit is coupled to the negative output terminal of the linear amplifier and generates a signal that represents a peak magnitude of a signal received from the negative output terminal. Upon power up of the signal detect circuit, a comparison circuit detects when the positive and negative peak signal magnitudes has both exceed respective values at least once. Once this occurs, the comparison circuit compares an interpolation of the positive peak signal and the negative peak signal with the value. If the interpolated signal falls below the value, the comparison circuit generates a signal representing that no signal is being received.
US07689121B2
An optical connection path surveillance device for a transparent optical network includes analysis means (80, 81) adapted to detect node signatures carried by an optical signal in transit at a point of said network, each node signature including information uniquely associated with a switching node of the network. The analysis means include calculation means (81) adapted to determine a number of hops from said detected node signatures and error detection means (81) adapted to compare said number of hops to a predetermined threshold in order to detect a routing error in relation to said optical signal if said threshold is exceeded. In one embodiment, a surveillance device detects looped paths on the basis of the detected node signatures.
US07689119B2
An image processing device including an optical system, a storage device, a position detecting device, and a direction detecting device. An optical system obtains an image of an object, and a storage device stores a predetermined position of an object to be shot. The position detecting device detects a current position of the image processing device, and the direction detecting device detects the directional orientation of the image processing device. A processor then determines whether an obtained object of shooting corresponds to the object to be shot by comparing signals output from said position detecting device and said direction detecting device with the stored position of the object to be shot.
US07689114B2
An imaging device equipped with an imaging system includes an imaging lens optical system which images an object, a flash emitting unit which synchronizes imaging in the imaging system to emit a flash having not less than a prescribed luminance in a charged state not less than a prescribed charged state by power to be charged, and a control unit which determines a charging amount of the charged state of the flash emitting unit and which controls imaging to be performed by using the flash emitting unit with an imaging sensitivity of the imaging lens optical system set in accordance with the charging amount of the charged state in imaging by the imaging lens optical system.
US07689113B2
A photographing apparatus and method employ an imaging device arranged including a matrix of pixels each which accumulates accumulation charges according to an amount of light incident thereon, an accumulation charge read device for reading the accumulation charges at a time difference based on the position of each row or column of the pixels, and a reset device resetting an entirety of the accumulation charges of the imaging device before a main exposure. The photographing apparatus and method each further employ a reset timing change device capable of changing a reset timing for resetting the accumulation charges with respect to a synchronization pulse corresponding to a time for reading the accumulation charges.
US07689110B2
A cam pin (16) and a demating prevention pin (35) that are provided in a driving frame (15) and have an identical shape are allowed to mate with a cam groove (18) and a demating prevention groove (36) that are provided in a cam frame (17), respectively. A first protrusion (37) is provided on at least one side in an optical axis direction of a portion of the demating prevention groove (36) with which the demating prevention pin (35) mates when the driving frame (15) is advanced. When an external force is applied to the driving frame (15), a cylindrical portion (35f) of the demating prevention pin (35) and the first protrusion (37) come into contact with each other. This prevents the cam pin (16) from demating from the cam groove (18). The cam pin (16) and the demating prevention pin (35) are made of common components, making it possible to reduce the number of components.
US07689105B2
A system and method in which read information is calculated with additional information as a coefficient and has superior in quality to basic information. The read information contains a larger amount of information than the basic information. So, even if an attempt is made to record the read information as it is to any other recording medium, the recording medium having a sufficiently large capacity for storage of the read information. Thus, copy of recorded data in the recording medium to any other recording medium is difficult.
US07689091B1
A fiber clamp (220) for clamping an optical fiber assembly (16) includes a clamp housing (230) and a member mover (228). The clamp housing (230) includes a base contact area (234) and a flexible member (238) that urges the optical fiber assembly (16) against the base contact area (234) to retain the optical fiber assembly (16). Further, the flexible member (238) includes a member contact area (238B) that engages the optical fiber assembly (16), and a member attachment area (238A). The member mover (228) selectively moves the member contact area (238B) relative to the member attachment area (238A) so that the optical fiber assembly (16) can be easily inserted between the base contact area (234) and the member contact area (238B). Additionally, the base contact area (234), and the flexible member (238) can be made of a one-piece, substantially homogeneous, unitary structure. With this design, the fiber clamp (220) can be made with minimal stack-up of tolerances. Further, the careful manufacture of the fiber clamp (220) guarantees that the forces on all contact areas (234) (238B) between the fiber or ferrule and the fiber clamp (220) are essentially the same. Moreover, the value of the forces is defined by geometry choices and material selection.
US07689086B2
Optical devices with versatile spectral attributes are provided that are implemented with one or more modulated and homogeneous layers to realize leaky-mode resonance operation and corresponding versatile spectral-band design. The first and/or higher multiple evanescent diffraction orders are applied to excite one or more leaky modes. The one- or two-dimensional periodic structure, fashioned by proper distribution of materials within each period, can have a resulting symmetric or asymmetric profile to permit a broadened variety of resonant leaky-mode devices to be realized. Thus, the attributes of the optical device permit, among other things, adjacent, distinct resonance frequencies or wavelengths to be produced, convenient shaping of the reflection and transmission spectra for such optical device to be accomplished, and the wavelength resonance locations to be precisely controlled so as to affect the extent to which the leaky modes interact with each other. Further, the profile asymmetry allows for the precise spectral spacing at interactive leaky modes so as to provide greater flexibility in optical device design.
US07689075B2
An optical wavelength division multiplexer/demultiplexer device is described that comprises a substrate having a plurality of wavelength selecting filters. The filters are arranged to provide conversion between a combined beam comprising a plurality of wavelength channels and a plurality of separate beams each comprising a subset of said plurality of wavelength channels. Hollow core waveguides are formed in said substrate to guide light between the wavelength selecting filters. An add/drop multiplexer is also described.
US07689073B2
A device employing at least one wavelength sieve/combiner that operates on discrete wavelength units and is optically interposed between an array of fibers and an array of micro mirrors which may be configured to act as in a multiplexing mode, a demultiplexing mode, a broadcast mode, and combinations of such modes. Each wavelength sieve/combiner can split a wavelength division multiplexed (WDM) beam into various discrete wavelength unit beams, combine various discrete wavelength unit beams into a WDM beam, or cause multiple copies of part or all of the wavelengths to be supplied as outputs. Typically, each fiber is associated with one wavelength sieve/combiner. Preferably, the beams between a wavelength sieve/combiner and the micro mirror array should be converging to the plane of the micro mirror array.
US07689066B2
An optical modulator is provided for modulating light propagating in a three-dimensional optical waveguide 5 by applying a voltage thereto. The optical modulator has the three-dimensional optical waveguide 5 including at least one pair of branch optical waveguides 5c and 5d, a multiplexing part 5e of the branch optical waveguides and an emission part 5f provided in the downstream of the multiplexing part, modulation electrodes 3A, 3B and 4 for applying a signal voltage for modulating light propagating in the three-dimensional optical waveguide 5, and guiding waveguides 6A and 6B for guiding primary mode light from the multiplexing part. Thickness of the substrate is 20 μm or less at least under the modulation electrodes, and an operation point of the optical modulator is controlled by changing, based on light output from the guiding waveguides, DC bias applied onto the modulation electrodes.
US07689064B2
A system and method for generating collections of media are provided. A media collage is constructed such that all its contained media, such as digital images, are selected and organized according to an associated characteristic. Sequential media collages can be generated by the same selection and organization approach.
US07689058B2
A method of producing a plurality of filter kernels comprised of filter coefficients for use in a sub-pixel rendering operation comprises calculating a plurality of filter coefficients for each filter kernel by dividing a spatial area of an input image that is overlapped by a portion of a spatial rendering area by a total area of the spatial rendering area using floating point arithmetic. The method further comprises multiplying each filter coefficient by a divisor to produce a filter product such that a sum of all filter products produces a filter sum that equals the divisor. Then a binary search operation is performed to find a round off point for the filter sum such that when each filter coefficient is converted to an integer, a sum of the filter coefficients equals the divisor. The filter coefficients are then converted to integers using the round off point.
US07689053B2
An image processing method is described which makes it possible to obtain an image which has a high quality and resolution without leaving boundaries of adjacent blocks detectable even in the case where the image has already been subjected to a processing of resolution enhancement (enlargement) of the image using a set of fractal parameters. The image processing apparatus 100 includes: an image division unit 114 which divides an input image IN into range blocks using L (L is an integer of 2 or more) numbers of division patterns so that at least one of the boundaries of each region in a division pattern varies from the boundaries of each region in the other division patterns; a parameter calculation unit 103 which calculates a set of fractal parameters of each range block of the input image IN so as to obtain L numbers of fractal parameters; an image transformation unit 107 which generates L numbers of fractal transformed images using, one by one, the modified sets of fractal parameters obtained according to enlargement ratios; and an image synthesis unit 112 which synthesizes the L numbers of transformed images so as to generate a single synthesized image. The image transformation unit 107 and the image synthesis unit 112 repeat the transformation and synthesis using in sequence the respective sets of fractal parameters until this synthesized image satisfies the convergence condition.
US07689047B2
A method of compressing an image according to an image compression algorithm includes sequentially receiving pixel values into a buffers bank in line-by-line order. The image includes a plurality of pixels arranged into lines and columns. Each pixel has a pixel value associated therewith. Each line has L pixels. The image compression algorithm operates on blocks of pixels, each block having N lines and M columns. The method also includes storing each block-line of pixel values in a buffer of the buffers bank. A block-line includes M consecutive pixels of a line. The method also includes, for each block-line, storing a pointer to the buffer in which the block-line is stored and reading block-lines out of the buffers bank to a compression engine, wherein the block-lines are read out of the buffers bank in an order that is different from the line-by-line order in which the block-lines were received into the buffers bank. The method further includes compressing the image according to the image compression algorithm and displaying the image.
US07689045B2
An image capture apparatus generates video data from captured images, and generates a video PES (packetized elementary stream) from the video data. The image capture apparatus converts the video PES into a MPEG-2 program stream, and converts the video PES into a MPEG-2 transport stream. The image capture apparatus records the MPEG-2 program stream on a random-access recording medium, and transmits the MPEG-2 transport stream to an external device. The conversion from the video PES into the MPEG-2 program stream and the conversion from the video PES into the MPEG-2 transport stream are performed in parallel thereby enabling the image capture apparatus to perform the recording of the MPEG-2 program stream and the transmission of the MPEG-2 transport stream in parallel.
US07689043B2
A camera A produces a 3D natural image B which is re-oriented and repositioned at N to predetermined parameters. Different processes C, D, E extract different features from the image to provide different processed images. The data space occupied by the processed images is reduced, for example by Principle Component Analysis, at F, G, H and the reduced processed images are combined at O to provide an image key I representative of the image B. The image key I is compared at J with stored image keys L of known images, and the output comparison is sorted at K to produce a final list M of potential matches. In a verification process, just a single image key L may be compared. The processed images at C, D, E may alternatively be combined prior to a single subspace reduction and/or optimisation method. 2D data may be combined with or used instead of the 3D data.
US07689023B2
In a method and system and machine-readable medium, colors in an image (200) are unmixed (202) using a matrix X=AS, where A is a ns. ×nd matrix of spectral definitions, where ns is the number of spectral components and nd is the number of dyes into which the image is decomposed, and where S is a nd×l matrix of amounts of each dye at every pixel, where l is the number of pixels; the matrix X is constrained for solution by an unsupervised matrix decomposition method having constraints consistent with properties of an additive color model; and nd is determined. A texture is determined to identify areas of interest. Further processing may automatically measure cell dye concentration in the determined regions of interest.
US07689015B2
A magnetic resonance imaging apparatus comprises an imaging condition setting unit, a receiving unit, an image reconstructing unit, an image distortion correcting unit and an image correction estimating unit. The imaging condition setting unit sets mutually different image conditions. The receiving unit receives magnetic resonance signals from an imaging area according to the image conditions. The image reconstructing unit reconstructs a plurality of image data corresponding to the image conditions respectively based on the magnetic resonance signals. The image distortion correcting unit corrects distortions of the plurality of the image data based on a magnetic field distribution on the imaging area. The image correction estimating unit estimates whether a correction of at least one of the plurality of the image data is appropriate based on a plurality of corrected image data.
US07689008B2
A system and method are provided for detecting one or both eyes of the driver of a vehicle. The system includes a video imaging camera oriented to generate images of the driver's face. The system also includes a video processor for processing the images generated with the video imaging camera. Filters are applied to each of potential eye candidates to determine which candidates represent an eye, weighted values are assigned to the filtered eye candidates, and an eye is detected based on the weighting of each eye candidate. According to one aspect, different size patches of potential eye candidates are processed and compared to models.
US07689001B2
The present invention relates to a location recognition device for recognizing a location by a mobile terminal having a camera and a method thereof. In the above method, the location recognition device photographs a location recognition tag storing location recognition information, and measures a distance to the location recognition tag. Subsequently, the location recognition device analyzes an image of the photographed location recognition tag, and recognizes location information corresponding to the location recognition tag and direction information of the photographed location recognition tag. Accordingly, a location of the mobile terminal is measured by using information of the measured distance and the recognized location information and direction information. In this case, an absolute location coordinate or a logic location coordinate is stored in the location recognition tag. In addition, the location recognition tags are arranged so that using the location recognition tags achieves a desired precision in a predetermined physical area.
US07688993B2
A method of embedding watermark data in a two-color image includes assessing the suitability of each of several candidate pixels to embed a bit of watermark data. Candidate pixels for which one pixel directly above, directly below, and immediately to the left and right of the candidate pixel have different colors, are identified. In one embodiment, only a single candidate pixel in each 2×2 block is identified. Suitability of each candidate pixel may be determined based on a relationship of coefficients computed from a binary wavelet or binary lifting transform formed from the image. Data is embedded by inverting suitable pixels. A recipient of the image may assess which blocks contain watermark data, by assessing the suitability of each 2×2 block in the image to embed data and extract data without further information about the data's location.
US07688973B2
According to each embodiment of this invention, an encryption apparatus, decryption apparatus, and key generation apparatus based on a public-key cryptographic scheme whose security is based on the divisor finding problem of obtaining a divisor on an algebraic surface which is a difficult problem that has not been solved by contemporary mathematics are realized by an arrangement using, as a private key, a section D of algebraic curves (divisors) on a fibration X(x, y, t) of an algebraic surface X. This makes it possible to create a public-key cryptographic scheme which can ensure security even in the advent of a quantum computer, can be securely realized by even current computers, and can be realized in a low-power environment.
US07688969B2
An electronic apparatus includes an operation dial, a board disposed at an inner position from the operation dial, a rotary encoder disposed on a surface of the board on the side opposite to the operation dial side, and a connection member which engages with an encoder shaft of the rotary encoder and is connected with the operation dial. The electronic apparatus is capable of reducing a projection of the operation dial from a surface of an operation panel and thus improving design of the electronic apparatus.
US07688968B1
An adaptive analog echo/near-end crosstalk (NEXT) cancellation system includes a selector that outputs a first error control signal when a first receive signal does not include a remotely transmitted signal and a second error control signal when the first receive signal includes a remotely transmitted signal. An echo/NEXT cancellation module communicates with the selector and generates an estimated echo/NEXT signal based on the first error control signal and a first transmit signal when the first receive signal does not include a remotely transmitted signal and based on the second error control signal and the first transmit signal when the first receive signal includes a remotely transmitted signal. A summing module receives the first receive signal and the estimated echo/NEXT signal and generates an echo/NEXT filtered receive signal by subtracting the estimated echo/NEXT signal from the first receive signal.
US07688967B2
A method of facilitating a telephonic response to an electronic message is described. The method includes determining at least one telephone number from a received electronic message, and assigning the determined telephone number dynamically to a button on the telephone to provide a speed dial button on the telephone. Determining the telephone number may include comparing an electronic mail address in an address field of the electronic message with a telephone directory to determine a telephone number associated with the address. If the electronic message is a text or a voice message, determining the telephone number may include parsing a body of the message to determine a telephone number, if present, which has been included into the body of the text message.
US07688959B2
A system and method for allowing remote callers to access a secure telephone network maintains a registry (i.e. a database) of all remote callers that have access to the network. The registry contains an electronic serial number (ESN) and a personal identification number (PIN) for each remote caller. The ESN is typically the serial number of the callers cellular telephone. Alternatively, the ESN is a phone number of the remote caller's telephone. To establish a connection, the remote caller calls a private branch exchange (PBX) of the secure network. Upon receiving the call, the PBX compares the ESN and PIN of the remote caller with the ESN and PIN stored in the registry. If a match is found, the PBX authenticates the remote caller and allows the connection. The remote caller may have full access or access limited by a connection policy.
US07688958B2
The present invention relates to telephone call processing. In one embodiment, a call processing system receives from a caller a first call for a user, the first call including call signaling information. The call processing system determines whether the call signaling information includes caller identification information and whether the call signaling information indicates that the caller identification information is restricted. If the caller identification information is restricted, the call processing system instructs the caller to take a first action so that the caller identification information can be provided to the user. The call processing system determines whether the caller has performed the first action during the first call, and if the caller has performed the first action during the first call, the call processing system provides at least a portion of the caller identification information to the user.
US07688953B2
Communications rate control is described. The rate control includes receiving a message addressed to a client device of a user. A determination is made as to a category of the message. Data of the message is synchronized between a server and the mobile device in response to one or more of the category and one or more user actions at the client device.
US07688925B2
An IO method and system for bit-deskewing are described. Embodiment includes a computer system with multiple components that transfer data among them. In one embodiment, a system component receives a forward strobe signal and multiple data bit signals from a transmitting component. The receiving component includes a forward strobe clock recovery circuit configurable to align a forward strobe sampling clock so as to improve sampling accuracy. The receiving component further includes at least one data bit clock recovery circuit configurable to align a data bit sampling clock so as to improve sampling accuracy, and to receive a signal from the forward strobe clock recovery circuit that causes the data bit sampling clock to track the forward strobe sampling clock during system operation.
US07688924B2
An integrated circuit device for use in a node of a communication system is provided. The integrated circuit device includes a memory configured to store data written thereto by a receiver associated with the node in accordance with a receiver clock, and to read data therefrom by a transmitter associated with the node in accordance with a transmitter clock. The integrated circuit device also includes a control logic circuit that is in communication with the memory, and is configured to send a control signal to the transmitter to adjust a speed of the transmitter clock responsive to an operating condition of the memory.
US07688921B2
A transmitting apparatus, a transmitting method, a receiving apparatus, a receiving method, a transceiver, a communication apparatus and method, a recording medium, and a program in which high quality voice can be decoded. A cellular telephone outputs coded voice data and also supplies uncoded voice sample data to a switching center while a telephone call is not made. Based on voice data used for the previous calculation processing and newly input voice data, the switching center performs calculation processing for quality-improving data for improving the quality of voice to be output from a cellular telephone that receives the coded voice data. The switching center stores the optimal quality-improving data as a user information database in association with the cellular telephone. The cellular telephone decodes the coded voice data based on the optimal quality-improving data supplied from the switching center.
US07688909B2
A radio transmitter includes an orthogonal transformation unit for carrying out an orthogonal transformation on pilot signals having orthogonal relation to each other between transmission antennas and a pilot multiplexing unit multiplexing the pilot signals and transmission data, and a radio receiver includes a channel estimation unit obtaining a channel estimate of a directive multibeam for each of reception antennas, an inverse transformation unit carrying out an inverse transformation of the orthogonal transformation on the obtained channel estimate and a received signal processing unit selectively conducting first processing based on the beam channel estimate in the first mode or second processing based on the channel estimate obtained by the inverse transformation unit in the second mode. This commonizes a common pilot for MIMO (second mode) and individual pilots for AAA (first mode), thus realizing the coexistence of MIMO and AAA without leading to a reduction of throughput.
US07688906B2
Method and embodiments in a multipath wireless communication system employing a wireless frame having alternating cyclic prefixes to reduce inter-symbol interference (ISI) are presented herein.
US07688892B2
In a high-efficiency encoder which performs motion-compensation prediction, an intra-field is set every n fields. The presence of a scene change is detected. When a scene change occurs, a reference picture of motion-compensation prediction is switched, or the field immediately after the scene change is set as an intra-field.
US07688881B2
According to one embodiment taught herein, a method of determining impairment correlations between a plurality of delays of interest for a received CDMA signal comprises generating kernel functions as samples of a net channel response of the received CDMA signal taken at defined chip sampling phases for delay differences between the plurality of delays of interest. In a parametric Generalized Rake (G-Rake) receiver embodiment, the delays of interest represent the delay positions of the fingers being used to characterized received signal. In a chip equalizer receiver embodiment, the delays of interest represent the delay positions of the equalizer taps. The method continues with determining impairment correlations based on convolving the kernel functions. Corresponding receiver circuits, including an impairment correlation estimation circuit configured for parametric G-Rake operation, may be implemented in a variety of communication devices and systems, such as in wireless communication network base stations and mobile stations.
US07688880B2
A high dynamic range low noise direct conversion transmitter within a multimode apparatus having multiple transmit and receive operating modes is described. The direct conversion transmitter can include a digital baseband coupled to a low noise direct conversion stage. A high dynamic range current folding digital to analog converter can be used to convert the digital baseband signals to analog representations. A wide dynamic range variable gain baseband amplifier couples the baseband signal to the direct conversion stage. A controllable passive attenuation stage operates to provide further gain control. Carrier feedthrough can be substantially eliminated using a carrier feedthrough cancellation loop that selectively utilizes one of a plurality of receivers configured for one of the multiple receive modes.
US07688879B2
In a method of forming a beam, data signals and pilot signals are generated by despreading signals that are received by a plurality of antennas, the received signals including a modulated data signal and a modulated pilot signal, respectively. A first covariance matrix is calculated for the pilot signals. A second covariance matrix is calculated for averages of the pilot signals. A weight vector is calculated based on the first and second covariance matrices. A beam forming output signal for forming a beam is generated based on the data signals and the weight vectors. Therefore, an optimal beam may be accurately formed.
US07688872B2
A self-calibrating integrated photonic circuit and a method of controlling the same. In one embodiment, the circuit includes: (1) a substrate, (2) a laser located on the substrate and configured to produce source light at an output frequency, (3) a laser alignment sensor located on the substrate and including: (3a) a reference optical resonator configured to receive the source light, have a null proximate a predetermined center frequency and provide output light as a function of a relationship between the output frequency and the center frequency and (3b) a photodetector configured to provide an electrical signal of a magnitude that is based on the output light and (4) a calibration controller located on the substrate, coupled to the photodetector and configured to adjust the output frequency based on the magnitude.
US07688870B2
Provided is a super luminescent diode having low power consumption due to low threshold current and a high output power in low-current operation, which is suitable for an external cavity laser. The super luminescent diode for use in the external cavity laser is divided into a super luminescent diode (SLD) region and a semiconductor optical amplifier (SOA) region to provide a light source having a low threshold current and a nearly double output power of a conventional SLD.A super luminescent diode-integrated reflective optical amplifier includes a substrate that has a super luminescent diode (SLD) region and a semiconductor optical amplifier (SOA) region for amplifying light generated from the SLD region, an optical waveguide that has a buried heterostructure, the buried heterostructure including an active layer extending over the SLD and SOA regions on the substrate and tapered in the SOA region; a current blocking layer formed around the active layer for blocking a current flow to layers other than the active layer, the current blocking layer including a stack of semiconductor layers having different conductivity types; and a clad layer formed on the optical waveguide and the current blocking layer.
US07688867B1
A dual-mode network storage controller integrated on a chip is connected to a first set of hosts over a block-level storage area network (SAN), and to a second set of hosts over a metadata Ethernet/IP network. The dual-mode storage controller is also connected to one or more storage devices, such as a Redundant Array of Independent Disks (RAID). The storage controller comprises dedicated-hardware metadata translation logic for translating metadata (e.g. file-level) storage commands into block-level storage commands. The storage controller can also include block translation logic for translating logical block-level storage commands into physical block-level storage commands. The storage controller further comprises multiplexing logic for sequentially transmitting to the storage device(s) block level storage commands derived from the commands received from the first set of hosts and the second set of hosts. The storage controller allows the first set of hosts and the second set of hosts to share a single storage device.
US07688866B2
In the communication system which performs the data communication by the discrete multi-tone modem scheme between a plurality of data communication units using the time-division half-duplex communication function, the ratio between the data transmission time suitable for data communication and the quasi-data transmission time dynamically changes within one period. Further, bits are assigned in such a manner that the data of one period can be transmitted during the data transmission time of that period. Dummy bits are assigned to the portions of the data transmission time to which the data to be transmitted has not been assigned.
US07688865B2
Disclosed are a method and system for estimating the skew and offset between two clocks in a computer system. The method comprises the steps of obtaining a first set of data values representing a forward delay between the first and second clocks, and obtaining a second set of data values representing a negative backward delay between the first and second clocks. The method comprises the further steps of forming a lower convex hull for said first set of data values, and forming an upper convex hull, above the lower convex hull, for said second set of data values. The clock offset and the skew between said first and second clocks are estimated using those convex hulls. In a preferred embodiment, this estimation is made by identifying a best clock line between the first and second convex hulls.
US07688855B2
A method for sending a multi-rate multi-receiver message containing a multi-receiver multi-response aggregate. The multi-rate multi-receiver aggregate is transmitted until a multi-receiver multi-response aggregate embedded within the multi-rate multi-receiver aggregate is encountered. Transmission of the multi-rate multi-receiver aggregate is suspended for a predetermined time period. After the expiration of the predetermined time period, transmission of the multi-rate multi-receiver aggregate resumes.
US07688846B2
In one embodiment, a sensing device (200) can include a transceiver (202) to monitor a communication signal, and a controller (203) communicatively coupled to the transceiver to receive from a Cluster Head (140) a schedule comprising a listening period and an active sensing period. During the listening period, the sensing device can monitor an occupied communication channel of the communication signal. During the active sensing period the sensing device can transmit in the occupied communication channel a test signal. The sensing device can increase a duty cycle of the test signal during repeated transmission, and calculate a correlation between a duration of the occupancy caused by an incumbent transmitting a communication signal in the communication channel and a duration of the test signal. A negative correlation can indicate the presence of an incumbent Carrier Sensing Multiple Access (CSMA) node transmitting a communication signal in the network.
US07688838B1
A method for communication includes inputting from a host processor to a network interface device a sequence of work requests indicative of operations to be carried out by the network interface device with respect to a plurality of the connections. The device looks ahead through the sequence in order to identify at least first and second operations that are to be carried out with respect to one of the connections in response to first and second work requests, respectively, wherein the second work request does not immediately follow the first work request in the sequence. The device loads the context data for the one of the connections from a host memory into a context cache, and performs at least the first and second operations sequentially while the context data are held in the cache.
US07688830B2
Disclosed is a method and apparatus for fully-distributed packet scheduling in a wireless network. The decoding algorithm with low-density parity-check code is applied in a transmission wireless network to achieve the fully-distributed packet scheduling. In the packet scheduling, only one wireless network node is needed to exchange information and communicate with its neighboring network nodes. Therefore, it is not necessary to estimate the signal to noise ratio, while being eye to eye among the neighboring network nodes. If the network load exceeds the network capacity, the present invention automatically eliminates the most difficult user to reduce the overall network load and diverts the resources to the surviving users.
US07688827B2
A wireless communication method in a wireless communication apparatus, which can exchange data with another wireless communication apparatus via a wireless communication, searches for another wireless communication apparatus, and determines a function of the other wireless communication apparatus. The method selects a communication route required to wirelessly communicate with the other wireless communication apparatus in accordance with the function of the other wireless communication apparatus, and communicates data to the other wireless communication apparatus in accordance with the selected communication route.
US07688810B2
During communication over the network, periods of silence may exist. The system may enable a user at a user terminal to determine one or more events that trigger the addition of a comfort signal. The system may monitor packet transmission to isolate the one or more events. The system may selectively add the comfort signal to the transmission in reaction to the triggering of the one or more events. The comfort signal may be added during periods of silence, as background noise, or during periods of silence and as background noise.
US07688804B2
A method and apparatus are provided for processing a contact with a client within a contact distributor. The method includes the steps of providing a primary SIP back-to-back user agent and an associated secondary SIP back-to-back user agent for each resource of a plurality of resources of the contact distributor and setting up a communication connection between the client and a resource of the plurality of resources through the provided primary back-to-back user agent of the resource. The method further includes the steps of an availability server monitoring the communication connection between the client and the resource, the availability server detecting a failure of the primary back-to-back user agent and the availability server transferring the connection from the primary back-to-back user agent to the associated secondary back-to-back user agent of the resource when the primary back-to-back user agent fails.
US07688802B2
A system includes multiple wireless nodes forming a cluster in a wireless network, where each wireless node is configured to communicate and exchange data wirelessly based on a clock. One of the wireless nodes is configured to operate as a cluster master. Each of the other wireless nodes is configured to (i) receive time synchronization information from a parent node, (ii) adjust its clock based on the received time synchronization information, and (iii) broadcast time synchronization information based on the time synchronization information received by that wireless node. The time synchronization information received by each of the other wireless nodes is based on time synchronization information provided by the cluster master so that the other wireless nodes substantially synchronize their clocks with the clock of the cluster master.
US07688801B2
Information packets are routed through a distributed routing network by determining a forwarding equivalency class (FEC) for each subscriber unit accessing the network. The FEC to which each subscriber unit belongs is based on the point at which the subscriber unit accesses the network. The forwarding equivalency class for each subscriber unit is updated if the subscriber unit accesses the network at a different point. Information packets are routed from a distribution point by determining the next point connected to the distribution point based on the forwarding equivalency class for the destination subscriber unit specified in the packet.
US07688800B2
An apparatus and method for changing a channel according to direct channel change information transmitted from a broadcasting station. The apparatus includes a broadcast receiver, a tuner and a controller for checking parsed DCC information. The broadcast receiver receives a broadcast signal. The tuner tunes channels and stores the tuned channels in memory. The controller parses DCC information received in the broadcast signal and checks for a target channel included in the DCC information. The controller then changes a channel by selecting one among plural virtual channels according to a predetermined priority when several virtual channels correspond to the target channel.
US07688794B2
A printing system is provided including a plurality of printing devices. Each printing device includes an associated radio frequency identification (RFID) device. The RFID device associated with a first printing device of the plurality of printing devices is operable to sense the presence of an RFID device associated with a second printing device of the plurality of printing devices for sensing the presence of the second printing device.
US07688792B2
A wireless network assigns a single IP address to the wireless device, which assigns this IP address over to a TE2 device coupled to the wireless device. The wireless device derives a private IP address for communication with the TE2 device. The wireless device forwards packets exchanged between the TE2 device and the wireless network using the single IP address. The wireless device exchanges packets with the TE2 device by (1) using the private IP address for outbound packets sent to the TE2 device and (2) performing either address-based routing or packet filtering on inbound packets received from the TE2 device. The wireless device exchanges packets with the wireless network by (1) using the single IP address for outbound packets sent to the wireless network and (2) performing packet filtering on inbound packets received from the wireless network.
US07688783B1
A method and apparatus for mixing Basic Service Set (BSS) and mesh traffic is presented. A same channel or a same radio is shared for mesh traffic and BSS traffic. The sharing of the channel including reserving a channel for BSS traffic by a Mesh Access Point (MAP), the reserving comprising sending a CC-RTS or a CC-CTS addressed to the MAP and/or blocking use of the channel by a BSS stations when the channel is not reserved for BSS traffic, the blocking use of the channel comprising the MAP sending a frame setting a NAV in the BSS. The shared radio is switchable between serving the BSS traffic and serving the mesh traffic.
US07688774B2
An arrangement for cancelling interference from a received signal, comprising: a first radio system and a second radio system employing a time slot structure in data transmission and operating on at least partly the same geographical area as the first radio system. A receiver of the first radio system is configured to control the cancellation of interference from the received signal on the basis of the timing employed in the time slot structure of the second radio system.
US07688764B2
A communication system provides in-band speaker arbitration in a multi-participant communication session by use of RTP floor control messages that include a speaker arbitration command embedded in a data packet header extension.
US07688762B2
In an example embodiment, a number of contending nodes and colliding nodes for a plurality of links of a network is determined. The capacity of each of the plurality of links is determined. A sum of the traffic demand of each of the plurality of links divided the throughput of each of the plurality of links is used to form a cost function for the network. One, or more, of a group consisting of a plurality of frequency assignments, a plurality of transmit powers, and a plurality of clear channel assessment (CCA) values is searched to obtain a global minimum for the cost function. The frequency assignments, transmit powers, and/or CCA values providing the global minimum for the cost function are selected.
US07688727B1
Methods and devices for processing packets are provided. The processing device may Include an input interface for receiving data units containing header information of respective packets; a first module configurable to perform packet filtering based on the received data units; a second module configurable to perform traffic analysis based on the received data units; a third module configurable to perform load balancing based on the received data units; and a fourth module configurable to perform route lookups based on the received data units.
US07688723B1
A system for analyzing at least a portion of a telecommunications network is provided. The system includes a traffic flow analyzer 124 operable to (a) assign a plurality of network components to at least first, second, and third component sets 1216, 1220 and 1224, respectively, wherein the first and second component sets correspond to voice communication endpoints; (b) determine bulk voice traffic flows at least one of generated and received by the first and second component sets and passing through the third component set; and (c) based on the bulk voice traffic flow passing through the third component set, determine a requirement for the third component set to realize a selected grade and/or quality of service.
US07688722B2
A communication apparatus originally transmits data packets via a first channel based on a first beacon interval. A memory thereof records the first beacon interval. A receiving interface thereof receives information of a second channel. A processor thereof determines whether the second channel has been used according to the information. If not, a transmission interface thereof switches the communication channel to the second channel, and transmits data based on the first beacon interval via the second channel in order to solve the problem that packets are delay for transmission or even abandoned due to overload of the beacon network.
US07688715B2
An apparatus for providing duplicated shelf managers in an ATCA system is provided. The apparatus for providing duplicated shelf managers includes a hub/switch in a control backplane to allow a manager to access the duplicated shelf managers all the time from an external network while maintaining the switch configuration defined of the ATCA specification. The hub/switch connects Ethernet ports of the duplicated two shelf managers and Ethernet ports of the two switches at the same time, and connects the two shelf managers and the two switches to the Internet.
US07688714B2
A network data packet routing apparatus with BGP is configured to soft reset an AFI or SAFI, so that forwarding on routes associated with the AFI or SAFI can continue even after an event or error. One approach involves establishing a Border Gateway Protocol (BGP) peering session between a first node and a second node in a packet-switched network; detecting a BGP condition requiring a reset of a BGP address family indicator (AFI) data structure or a sub-address family indicator (SAFI) data structure, wherein the BGP condition does not affect states of routes in the AFI or SAFI; preserving a BGP state and a forwarding state of the AFI or SAFI; and forwarding data on routes represented in the AFI or SAFI. Soft notification messaging and marking routes as stale facilitates the approach.
US07688712B2
A method and network access point selection logic are described for a redundantly connected industrial LAN node including at least primary and backup network access points. Network connectivity is determined by a redundantly connected node by testing connectivity between the node's primary and backup physical network access points. Upon detecting a loss of connectivity between the redundant node's primary and backup network access points, the node executes access point selection logic, based upon tests of connectivity between the redundantly connected (primary and backup) network access points and a set of nodes on the LAN, to select a preferred/primary one of the redundant access points. Thereafter, the redundantly connected node binds its connections according to primary and backup designations for its redundant network access points.
US07688702B2
A single-sided dual-layer optical disc comprising an optically transparent layer; a first recording layer accessed by a first laser beam; an intermediate layer; and a second recording layer accessed by a second laser beam, wherein the optically transparent layer, the first recording layer, the intermediate layer, and the second recording layer are sequentially disposed in a laser beam incidence direction, wherein a thickness of the optically transparent layer, which is a distance from a light incident surface to the first recording layer, is 550 to 575 μm, wherein a thickness of the intermediate layer, which is a distance between the first and second recording layers, is 29 to 47 μm, and wherein a surface recording density of the second recording layer is at least 3 times that of the first recording layer.
US07688691B2
A signal processing apparatus for an optical disk system which apparatus has a variable gain amplifier that amplifies with a variable gain a light-detected signal obtained from an optical disk on which to perform playback processing so as to make a level of the light-detected signal coincide with a first reference level. The apparatus comprises a comparator that compares the level of the light-detected signal amplified by the variable gain amplifier with the first reference level; a gain adjuster that generates and supplies a control signal to adjust the variable gain according to a result of the comparing to the variable gain amplifier; and a gain adjustment controller that, when the level of the light-detected signal amplified is within a level range including the first reference level, controls a level of the control signal of the gain adjuster to be held at its preceding value.
US07688690B2
A method of determining whether an optical pick-up of an optical device passes through a data track of a storage device during track-seeking based on a radio frequency (RF) signal, a radio frequency zero cross (RFZC) signal radio and a track-seeking signal of the optical device. When the optical pick-up of the optical device passes through a data track of the storage device during track-seeking, a trigger signal is sent to a data phase locked loop of the optical device for frequency and phase adjustment. The method can activate the data phase locked loop of the optical device while the optical device is performing track-seeking.
US07688689B2
A head assembly comprises a slider including a transducer and a coupler for coupling electromagnetic radiation into the transducer, and an optical bench positioned adjacent to the slider, the optical bench including a mirror and a lens for directing electromagnetic radiation onto the mirror, wherein electromagnetic radiation passing through the lens is reflected by the mirror and focused onto the coupler. A microactuator can be included to move at least a portion of the optical bench. Disc drives that include the head assembly and a method of making the head assembly are also included.
US07688679B2
A system for locating and identifying an acoustic event such as gunfire. The inventive system employs a plurality of man wearable acoustic sensors for detecting gunfire, each acoustic sensor having a display associated therewith for displaying information concerning the acoustic event to a user. In preferred embodiments, the sensor includes a microphone for/receiving acoustic information; an A/D converter; a processor for processing the digitized signal to detect a gunshot and determine a time of arrival; a GPS receiver for determining the position of the acoustic sensor; and a network interface for bidirectional communication with a system server. Preferably the display comprises an LCD; and an electronically readable compass. When the display and acoustic sensor are in separate housings, the acoustic sensor includes a transmitter and the display includes a receiver for transferring the gunshot information.
US07688674B2
Methods and apparatus for creating a velocity profile of a formation surrounding a borehole by checkshot measurements while moving the tool along the borehole. A conveyance and a sensor section are configured to move the sensor section in the borehole. At least one receiver is configured to detect signals generated at or near the surface while the sensor section is moving in the borehole.
US07688672B2
Self-timed interfaces and methods for interfacing different timing domains. These self-timed interfaces receive a strobe signal from a component operating under a first clock domain. A first signal path of the self-timed interface couples the strobe signal to a receiver that samples data of data line under control of the strobe signal. A second signal path of the self-timed interface couples the strobe signal to an interface circuit through a hysteresis-based element. The interface circuit, under control of an output of the hysteresis-based element along with a clock signal that originates under a second clock domain, generates an interface enable signal for use in controlling data transfers between the different clock domains.
US07688670B2
A synchronous DRAM is provided which includes arrangements for operations of power supply circuitry based upon whether the DRAM is in a power down mode or not. In one embodiment, a first power supply circuit and a second power supply circuit are provided which both receive externally supplied voltages and output internal supply voltages. The first power supply circuit is not in operation when a semiconductor device of the synchronous DRAM is in a power down mode. However, the second power supply circuit is continuously in operation during the power down mode. In another arrangement, the operation of a voltage limiter circuit is controlled based on whether or not the DRAM is in a power down mode.
US07688668B2
A semiconductor memory storage cell and a memory comprising an array of these storage cells is disclosed. The storage cell comprising: a feedback loop comprising two devices for storing opposite binary values; data input and output for inputting data to and outputting data from said two devices; and each of said two devices comprising a power source input, such that each device can be powered independently of the other.
US07688657B2
A test signal generating apparatus for a semiconductor integrated circuit includes a fuse control unit that generates a plurality of fuse enable signals in response to a clock and a power-up signal, and a plurality of test mode fuses that individually output test mode fuse signals so as to generate test signals in response to the fuse enable signals after a test mode is completed.
US07688653B2
A plurality of improved memory systems employing a phase detection system in conjunction with either a synchronous mirror delay or a delay-locked loop, and related methods of operation, are disclosed. The memory systems determine timing characteristics among multiple signals and, based upon those timing characteristics, vary which clock-related signal is output. The improvement relates in part to the incorporation of a clock divider that reduces the frequency of the clock signals utilized by the system. Due to the incorporation of the clock divider and an edge recovery device, attenuation, power dissipation and duty cycle distortion associated with propagation of the clock signal(s) are reduced. Further, the reduction in frequency of the clock signals allows for numerous differently-phased clock signals to be generated within the system, which allows for finer timing comparisons to be performed, thus allowing for finer selections to be made in relation to which clock-related signal is output.
US07688652B2
In an embodiment, a memory device comprises memory, a first data link, a first input, a second input, a second data link, a first output and a second output. The first data link is configured to input one or more packets into the memory device. The first input is configured to input command strobe signals into the memory device that delineate command packets that are input into the memory device via the first data link. The second input is configured to input data strobe signals into the memory device that delineate data packets that are input into the memory device via the first data link. The first and second outputs are configured to output the command strobe signal and data strobe signal, respectively. The second data link is configured to output packets from the memory device.
US07688650B2
Write control circuitry and control method are provided for a memory array configured with multiple memory subarrays. The write control circuitry includes multiple subarray write controllers associated with the multiple memory subarrays, each subarray write controller selectively enabling a local write control signal to its associated memory subarray. The selectively enabling is responsive to a received subarray select signal, wherein only one subarray select signal is active at a time. At least some subarray write controllers are powered at least in part via a switched power node, wherein powering of the switched power node is distributively implemented among the subarray write controllers. In one example, the distributively implemented powering of the switched power node is accomplished via multiple inverters distributed among the subarray write controllers, each inverter having an output coupled to the switched power node, and an input coupled to receive a global write enable signal.
US07688649B2
A semiconductor memory device having a memory cell array, an input buffer, an output buffer, and an input-output control circuit that receives a write control signal and controls the input and output buffers. The output buffer generates a commencement signal indicating commencement of output. A mask generating circuit generates a mask signal with delayed active-to-inactive transitions from the commencement signal. A masking circuit passes the write control signal to the input-output control circuit while the mask signal is inactive, and holds the write control signal in the write-disabling state while the mask signal is active. The mask signal prevents unintended writing of data in the memory cell array when the write control signal is contaminated by noise from the output buffer.
US07688634B2
Embodiments of the invention relate generally to a method for writing at least one memory cell of an integrated circuit; a method for writing at least two memory cells of an integrated circuit; and to integrated circuits. In an embodiment of the invention, a method for writing at least one memory cell of an integrated circuit is provided. The method includes determining a writing state of at least one reference memory cell, depending on the writing state of the at least one reference memory cell, writing the at least one memory cell, and writing the at least one reference memory cell to a given writing state.
US07688631B2
Provided is a method of programming the flash memory device including setting increments of program voltages according to data states expressed as threshold voltage distributions of multi-level memory cells. An Increment Step Pulse Programming (ISPP) clock signal corresponds to a loop clock signal and the increments of the program voltages and is generated in response to program pass/fail information. A default level enable signal is generated by performing a counting operation until reaching the increments of the program voltages, in response to the loop clock signal. An additional level enable signal is generated by performing a counting operation until reaching the increments of the program voltages, in response to the ISPP clock signal. The program voltage is increased by 1 increment, in response to the default level enable signal. The program voltage is increased by 2 increments, in response to the additional level enable signal.
US07688628B2
Embodiments of the invention take advantage of an unused state of an interface protocol (or specification), such as the ONFI specification, to control a selector circuit to assert one of a plurality of relatively localized device selection signals (e.g., chip enable signals).
US07688620B2
In a nonvolatile memory device, a program operation is performed on a plurality of nonvolatile memory cells by programming data having a first logic state in a first group among a plurality of selected memory cells selected from the plurality of nonvolatile memory cells during a first program interval of the program operation, and thereafter, programming data having a second logic state different from the first logic state in a second group among the selected memory cells during a second program interval of the program operation after the first program interval.
US07688610B2
A low power matchline sensing scheme where power is distributed according to the number of mismatching bits occurring on a matchline is disclosed. In particular, match decisions involving a larger number of mismatched bits consume less power compared to match decisions having a lesser number of mismatched bits. The low power matchline sensing scheme is based upon a precharge-to-miss sensing architecture, and includes a current control circuit coupled to each matchline of the content addressable memory array for monitoring the voltage level of the matchline during a search operation. The current control circuit provides a voltage control signal to the current source of the matchline to adjust the amount of current applied to the matchline in response to the voltage of the matchline. In other words, matchlines that are slow to reach the match threshold voltage due to the presence of one or more mismatching bits will receive less current than matchlines having no mismatching bits. Significant power reduction without compromising search speed is realized since matchlines carrying a match result are provided with the maximum amount of current.
US07688604B2
A first inverter control unit includes a harmonic generation unit. The harmonic generation unit generates a harmonic voltage instruction having a phase opposite to a harmonic generated at a neutral point of a motor-generator when the motor-generator revolves, based on motor revolution number of the motor-generator. A PWM signal generation unit generates a signal based on a voltage instruction obtained by superimposing an AC voltage instruction from an AC output control unit and the harmonic voltage instruction from the harmonic generation unit onto each voltage instruction of U-phase, V-phase and W-phase from a conversion unit.
US07688602B2
Circuit and method for controlling a synchronous rectifier. A circuit for monitoring the drain to source voltage of an SR transistor in a secondary side circuit of a voltage converter is disclosed, having a circuit for generating a gate control circuit for the SR MOSFET; the circuit preventing subsequent gate control signals until a primary turn on detection signal is received. In another embodiment a circuit for generating the primary turn on detection signal is provided. A method for controlling an SR transistor is disclosed comprising monitoring the drain to source voltage of the SR MOSFET, generating a gate control output, and preventing subsequent gate control output signals until a primary turn on detection signal is received. In another method embodiment a method for generating the primary turn on detection signal is disclosed. An SR embodiment incorporating the control circuit embodiments is disclosed.
US07688601B2
In order to increase the power of an induction heating device or in order to avoid system reactions when driving the latter, either the pulse widths of the two switching means can be made unsymmetrical in the case of half-bridge driving up to the half-point of a half-cycle. Alternatively, a dead time between the pulse width can be extended. This advantageously takes place without interruption and continuously. In the course of a half-cycle, the power is thus reduced given an unaltered operating frequency and an inductor current has virtually an ideal sine-wave form.
US07688594B2
A flexible printed circuit board has an insulation layer, a first signal wiring layer including a microstrip line, a second signal wiring layer including a signal connection terminal for allowing the microstrip line to connect the exterior connector electrically, and a ground conductive section having a ground connection terminal for connecting the exterior connector. The microstrip line and the signal connection terminal are connected to each other by a wiring via hole. The wiring via hole passes through the insulation layer, the first signal wiring layer, and the second signal wiring layer. The microstrip line has a taper section which gradually enlarges a width of the microstrip line toward the wiring via hole in the vicinity of the wiring via hole. The ground conductive section that corresponds to the microstrip line has a taper section with a shape matching the taper section of the microstrip line.
US07688590B2
A thermal module suitable for cooling a heat generating element within a casing of an electronic apparatus includes a fan, a heat sink and a heat pipe. The fan is mounted within the casing for generating airflow to an opening of the casing. The heat sink is mounted within the casing between the opening of the casing and the fan, such that the airflow generated by the fan passes through the heat sink and then flows out of the opening. The heat pipe contacts the heat generating element, extends from the heat generating element to the heat sink, and extends along a periphery of the fan to contact the heat generating element again.
US07688567B2
A method of manufacturing a multilayer capacitor comprises a first layer forming step, a first electrode forming step, a second layer forming step, a second electrode forming step, a separation step, an element forming step and a terminal forming step. In the first layer forming step, a first ceramic green layer is formed on a supporting body. In the first electrode forming step, a first electrode pattern is formed on the first ceramic green layer. In the second layer forming step, a second ceramic green layer is formed laminated on the first ceramic green layer. In the second electrode forming step, a second electrode pattern is formed at the second ceramic green layer. In the separation step, the support body is separated from the laminated body. In the element forming step, elements are formed by laminating a plurality of the laminated bodies.
US07688565B2
Circuit arrangement embodiments that use relative groupings of energy pathways that include shielding circuit arrangements that can sustain and condition electrically complementary energy confluences.
US07688556B2
The present invention discloses an arc-discharge detection device, which is used to detect the arc discharge persistently occurring in between an inverter and a load during an abnormal power transmission state. The inverter is arranged in a circuit board, and a carbonized loop is defined in an arc-discharge reaction area of the circuit board. In the present invention, a power-variation detection unit is electrically coupled to the carbonized loop and detects the power-level variation caused by the carbonized loop and generates a power-variation signal; an interpretation unit receives the power-variation signal and utilizes a decision level to determine whether the power variation is caused by arc discharge and outputs an abnormal-power signal if the interpretation result is positive; and a trigger unit is driven by the abnormal-power signal to interrupt the inverter's outputting high-voltage power to the load.
US07688545B1
A magnetic recording head with an overall planar design and tight dimensional control of throat height and notch width is achieved below the gap. Writer poles include very high magnetic moment material on both sides of the writer gap. Additionally the pole tips are shaped to provide high field with good spatial gradient for optimal writing conditions, thereby extending the capability of longitudinal recording heads for high density and high frequency applications.
US07688544B1
A write head includes a write return yoke, a write yoke connected to the write return yoke, conductive coils surrounding the write yoke, a write pole tip, and a non-magnetic spacer connecting the write pole tip to the write yoke. The non-magnetic spacer allows for reducing a magnetization of the write pole tip due to a remnant magnetic field in the write yoke. In another embodiment, the write head comprises a write shield, a write return yoke, a write yoke, conductive coils, a write pole tip, and a saturable yoke shunt connecting the write pole tip and the write shield. The saturable yoke shunt directs a limited amount of magnetic flux from the write pole tip to the write shield, such that when there is a remnant magnetic field in the write pole tip, the magnetic flux is directed to the write shield rather than to a disk.
US07688530B1
A mounting system allowing rapid removal and replacement of optical components within an instrument includes a base unit connected to the instrument, and a carrier unit which includes an optical component. The carrier unit is magnetically attracted to the base unit, with mounting nubs extending from one of the base and carrier units being received in depressions defined in the other of the units. Preferably, the magnets on the base and carrier units are aligned, and V-groove depressions receive hemispherical surfaces presented by the mounting nubs. When the base and carrier units are generated using precision manufacturing methods, the optical component on the carrier unit can maintain a predefined alignment upon the base unit (and the instrument) with sub-micrometer precision between successive mountings and removals of the carrier unit, thereby avoiding the need to realign the optical component within the instrument every time the carrier unit is removed and replaced.
US07688523B2
An image pickup lens is provided for forming an image of an object on a photoelectrical converter of a solid-state image pickup element. The image pickup lens includes, in order from an object side thereof: an aperture stop; a first lens having a positive refractive power; a second lens having a negative refractive power and including a concave surface facing an image side of the image pickup lens; a third lens including an aspheric surface; and a fourth lens including an aspheric surface. The image pickup lens satisfies predetermined conditions relating to a curvature radius of the surface of the second lens facing the image side and a refractive power of the third lens.
US07688506B2
Light emitted from a light source is modulated and projected on a screen. The screen includes a securing member, a diffuser plate supported by the securing member using a plurality of elastic members, where the elastic members are disposed so that the diffuser plate is resiliently displaced in two directions in the plane of the diffuser plate, and a driving unit that moves the diffuser plate with respect to the securing member in the two directions in the plane of the diffuser plate.
US07688503B2
A microscopy system allows to superimpose a light optically generated microscopic image of an object with an electronically generated image. The electronically generated image is composed of two input images, one of which is independent of optical settings of an ocular tube, such as a rotational position and a magnification thereof, and the other input image is dependent of the optical setting.
US07688498B2
An optical amplifier of the present invention comprises: an optical amplifying circuit which amplifies a signal light; an optical reflection medium which is disposed on an optical fiber connected to the optical amplifying circuit and is capable of reflecting a noise light which exists in a predetermined wavelength range outside a signal band, among noise lights generated in said optical amplifying circuit, to radiate the reflected noise light to the outside of a core of the optical fiber; a light receiver which receives the noise light reflected to be radiated to the outside of the core of the optical fiber by the optical reflection medium, to detect the power of the noise light; and a computation circuit which computes the total power of the noise lights generated in the optical amplifying circuit based on the detection result of the light receiver. Thus, it is possible to provide at a low cost an optical amplifier provided with a monitoring function capable of detecting high accurately, with a simple optical circuit configuration, the noise light power and the like generated when the signal light is amplified.
US07688497B2
A multi-layer film (300), useful as a barrier film in electro-optic displays, comprises a light-transmissive adhesive layer (316), a light-transmissive first protective layer (312), a light-transmissive first moisture barrier layer (308B), an intermediate layer (typically an adhesive layer) (310), a light-transmissive second moisture barrier layer (308A) and a light-transmissive second protective layer (306). The second protective layer may be covered by a hard coat (304) and/or a masking film (302).
US07688496B2
The invention provides a display medium having a dimmer layer which comprises at least two kinds of charged mobile fine particles. Each of the at least two kinds of the charged mobile fine particles respectively has different coloration and a different mobility, and the charged mobile fine particles of at least one kind of the at least two kinds show coloration when in a dispersed state. The invention further provides a display device having an electric field forming unit and the dimmer layer. The invention further provides a display method which uses the display medium and includes putting the charged mobile fine particles of at least one of the kinds being dispersed while having other charged mobile fine particles not being dispersed.
US07688480B2
An automatic scanning parameter setting device and method. The automatic scanning parameter setting device is a scanner that automatically sets the scanning parameters of a plurality of scan images so that scanning can be conducted in batches. The automatic scanning parameter setting device includes an image input device, an analysis device and a control unit. The image input device is attached to the scanner for inputting a plurality of scan images. A portion of the scan images contains a set parameter format. The set parameter format contains a plurality of scanning parameter values. The analysis device performs an analysis of the scan images containing recorded scan parameter values. The control unit uses the analyzed scanning parameter values to conduct a scanning parameter setting operation on the scan images having recorded scanning parameter values as well as the ordered scan images after the scan images with recorded scan parameter values but without recorded scan parameter values.
US07688478B2
An image processing apparatus which processes input image signals in real time. A plurality of image signals are input via input terminals. An external storage device stores a plurality of kinds of procedures for processing to be performed on image signals. A JOG dial specifies at least two kinds of procedures among the stored plurality of kinds of procedures, and enables the specified procedures and a procedure between the specified procedures to be arbitrarily changed and specified. When the procedure between the specified procedures is specified using the JOG dial, a CPU generates the specified procedure by interpolating the specified procedures, and carries out real-time processing on image signals for corresponding channels among the image signals for the plurality of channels according to the generated specified procedure.
US07688470B2
Disclosed are systems and methods for color calibration incorporating gray-component replacement, and more particularly, controlling gray component replacement in a color output device by applying a pre-defined transformation to a plurality of non-black channels to obtain at least one intermediate variable, and determining at least one output black (K) value from both the black channel input value and the intermediate variable, in order to provide control of gray component replacement in the color output device.
US07688465B2
An information managing apparatus assigns identification information to print information and manages the print information based on the identification information. A receiving section receives a plurality of items of data. A first counter is defined in a non-volatile first memory. A second counter is defined in a volatile second memory. An identification information producing section produces the identification information for each of the plurality of items of data based on a count of the first counter and a count of the second counter. An identification information managing section manages the plurality of items of data based on the identification information. The second counter counts up by a value every time the receiving section receives an item of data, and the first counter counts up when the image forming apparatus is turned on, and when the second counter overflows.
US07688464B2
A P2P printing system and method is disclosed. The printing comprising a system computer readable storage medium, storing instructions that, when executed, cause a printing device to perform a method. The method comprising establishing communications between one or more other printing devices, each printing device capable of sharing files with the other printing devices via a P2P file sharing network.
US07688463B2
An image forming apparatus according to the present invention is capable of executing printing processes for color images and monochromatic images and comprises a printer section capable of executing processes for color printing and monochromatic printing and a printing task management section for receiving a plurality of printing jobs including color printing jobs and monochromatic printing jobs as input, computationally determining the processing time required for each of the printing processes on the basis of the information indicating color printing or monochromatic printing and the information indicating the number of copies to be printed and outputting the data of the printing jobs of short processing time separately for monochromatic printing and color printing with priority to the printer section.
US07688462B2
A computer readable recording medium stores a printer driver program to be installed in a computer in order to use a printer. The printer driver program includes a grasping processing for grasping version information of various kinds of printer related programs for executing a processing as to the printer, installed in the computer; and a version information displaying processing for, when a predetermined version information displaying instruction is input, displaying version information of the printer driver program together with version information of the printer related programs grasped by the grasping processing.
US07688452B2
Air gap variation in an interferometric modulator over a two-dimensional spatial map of the modulator is determined by acquiring a digital photograph of the modulator. Color parameters of individual pixels in the photograph are determined and compared to a model of color parameters as a function of air gap distance. The model and individual pixel color parameters may be plotted on a color space plot for comparison. The determined distances may be plotted over a two-dimensional spatial map of the interferometric modulator to visualize the mirror curvature and air gap variation.
US07688440B2
The invention provides diagnostic apparatuses that are advantageously adapted for the Raman spectroscopic analysis of fluid samples, such as biological fluid samples, deposited on test strip substrates. The tests strips may be include a surface-enhanced Raman spectroscopy (SERS) surface for deposition and analysis of a sample and/or may be lateral flow binding assay type test strips.
US07688427B2
A system for determining particle parameters. The system may, for example, may optically determine parameters common to a hematology analysis. Such parameters may include a red blood cell count, a platelet count, a mean cell volume and a red cell distribution width. A hematocrit parameter may be calculated. Also, a measurement of hemoglobin in a blood sample may be obtained leading to a calculation of a mean mass of hemoglobin in a red blood cell and a mean cell hemoglobin concentration. The system may be implemented in a portable cartridge type cytometer.
US07688423B2
A method and system are provided for forming a pattern within an area of a photosensitive surface. An exemplary method includes performing a first exposure of the photosensitive surface in accordance with predetermined image data, wherein the first exposure occurs during a first pass and produces a first image within the area. The image data is adjusted to compensate for identified image deficiencies image deficiencies, the image deficiencies being within a region of the first image. A second exposure, of the photosensitive surface, is performed in accordance with the adjusted image data during a second pass.
US07688419B2
A thin film transistor array substrate structure. The array substrate structure includes a thin film transistor array substrate, an organic material layer formed thereon, and a plurality of black matrices and color filter patterns disposed on the organic material layer. The invention also provides a method of fabricating the thin film transistor array substrate.
US07688416B2
Structural objects are disposed in a peripheral region in positions opposed to spacers. In this way, a substrate surface of a counter substrate in the peripheral region is gently inclined in a direction away from a liquid crystal layer. In this way, it is possible to prevent unevenness in display attributable to a difference in a cell gap between a display region and the peripheral region.
US07688408B2
There is provided a liquid crystal device, wherein a liquid crystal layer is interposed between a first substrate and a second substrate, and at least a display pixel corresponding to a colored region of a color from blue to green in a visible light region of which the color varies depending on a wavelength is included, wherein at least one of the first substrate and the second substrate has a spacer which defines the thickness of the liquid crystal layer and an alignment film which is subjected to a rubbing process in a predetermined direction, and wherein a relative positional relationship between the spacer and the display pixel is defined such that a region of the alignment film, which is not subjected to the rubbing process due to existence of the spacer at the time of the rubbing process, is positioned in the display pixel corresponding to the colored region of the color from blue to green.
US07688404B2
A LCD device and a method for fabricating the same is disclosed that decreases the fabrication time of the LCD device by obtaining a white color in a fourth pixel region using first, second, and third auxiliary color filter layers, and improve the resolution for the white color by controlling the width of the auxiliary color filter layers. The device includes first and second substrates having first, second, third and fourth pixel regions arranged repetitively; a black matrix layer formed on the second substrate corresponding to portions of the substrates other than the pixel regions; first, second and third color filter layers respectively formed on the first, second, and third pixel regions of the second substrate; first, second, and third auxiliary color filter layers formed on the fourth pixel region of the second substrate to display a white color; and a liquid crystal layer formed between the first and second substrates.
US07688401B2
A light source element is employed back-lighting of liquid crystal displays and that comprises an obliquely placed light exit face and/or light entry face. At its surfaces, the light waveguide is surrounded by reflectors into which suitable aperture regions are potentially formed. A plurality of light sources and/or a more direct view is provided and, thus, a corresponding increase of the luminance results. A method is also provided for the manufacture of a light source element with an integrated reflector.
US07688400B1
A light source element is employed back-lighting of liquid crystal displays and that comprises an obliquely placed light exit face and/or light entry face. At its surfaces, the light waveguide is surrounded by reflectors into which suitable aperture regions are potentially formed. A plurality of light sources and/or a more direct view is provided and, thus, a corresponding increase of the luminance results. A method is also provided for the manufacture of a light source element with an integrated reflector.
US07688398B2
A backlight assembly, which can provide improved display features by preventing a lamp assembly from being loosened from a lower receiving container, and a liquid crystal display apparatus including the backlight assembly. The backlight assembly includes a light guiding plate guiding incident light, a lamp assembly disposed at one or more sides of the light guiding plate, and having at least one lamp to generate light and a lamp cover enclosing the lamp, a lower receiving container having a bottom plane and sidewalls formed around the periphery of the bottom plane and receiving the lamp assembly and the light guiding plate, and at least one elastic and conductive gasket including a hot-melt adhesive agent having a melting point greater than or equal to about 60° C. and interposed between the lamp cover and the lower receiving container.
US07688397B2
A display unit includes a display mounting main body 1 secured to a ceiling to which a display is installed; the display 3 openably/closably and rotatably attached to the display mounting main body 1 through a pair of lateral rotating hinge shafts 2; and a circuit board provided as a control system of the display, wherein a wiring-relay circuit board 8 is mounted and disposed on the axis of rotation at the upper part in the extending rotating position of the display 3, and electrically connects a main circuit board disposed in the display mounting main body 1 with an LCD 4 to thereby intermediately connect wirings.
US07688396B2
A backlight module having replaceable lamp module is provided. The backlight module includes a replaceable lamp module, a light-guiding plate, a frame and a positioning and protecting mechanism. The light-guiding plate is disposed over the bottom surface among four sides of the frame, wherein one side of the light-guiding plate and a corresponding side of the frame form a sliding groove. The replaceable lamp module is set in the sliding groove and slidably along the sliding groove. The positioning and protecting mechanism comprises a protecting device set on the replaceable lamp module and a positioning device set on the frame. The protecting device is capable of forming a gap between the replaceable lamp module and the bottom of the sliding groove in order to protect the replaceable lamp module from scraped by the structures of the backlight module while the replaceable lamp module is inserting into the sliding groove. The protecting device and the positioning device are capable of positioning and holding the replaceable lamp module in the sliding groove while the replaceable lamp module reaches the predetermined position in the backlight module, and meantime the gap is disappeared.
US07688394B2
It is an object to provide an active matrix liquid crystal display device capable of effectively eliminating flicker with a simple structure. An active matrix liquid crystal display device has a plurality of gate lines, a plurality of source busses extending orthogonal to the gate lines, a plurality of liquid crystal elements provided in intersections of the gate lines with the source busses and, as a whole, disposed in matrix form, the liquid crystal devices being connected between a pixel electrode and an opposite electrode connected to a first bus line in a floating condition, a plurality of control circuits provided in relation with the liquid crystal element, the control circuits having: first and second transistors, of which gates are connected to the gate lines respectively, arranged in series between the source busses and the pixel electrode, a third transistor provided between a midpoint node of the first and second transistors and a second bus line to serve as a switch, the second bus line being identical in potential to the first bus line and being electrically isolated from the first bus line, and a fourth transistor connected in parallel with the liquid crystal elements between the pixel electrode and the opposite electrode to detect drain voltage.
US07688390B2
There is provided a broadcast receiving apparatus having a broadcast receiving unit. The apparatus includes: an instruction receiving unit which receives a broadcasting type selection instruction or a channel number selection instruction, and a control unit which, when the instruction receiving unit receives the broadcasting type selection instruction, controls the broadcast receiving unit to receive a broadcast wave specified by a combination of a current channel number and a type of broadcasting corresponding to the received selection instruction if an elapsed time from latest reception of a channel number selection instruction is not more than a predetermined time, and receive a broadcast wave specified by a combination of a type of broadcasting corresponding to the received selection instruction and a default channel number associated with the type of broadcasting if the elapsed time from the latest reception of a channel number selection instruction is more than the predetermined time.
US07688378B2
An image sensor and a method of forming an image sensor. The image sensor includes an array of pixel cells at a surface of a substrate. Each pixel cell has a photo-conversion device. At least one a micro-electro-mechanical system (MEMS) element including a photonic crystal structure is provided over at least one of the pixel cells. The MEMS-based photonic crystal element is supported by a support structure and configured to selectively permit electromagnetic wavelengths to reach the photo-conversion device upon application of a voltage. As such, the MEMS-based photonic crystal element of the invention can replace or compliment conventional filters, e.g., color filter arrays.
US07688371B2
This invention provides an image pickup device comprising a plurality of pixels each including a photoelectric conversion unit, a semiconductor area to which a signal from the photoelectric conversion unit is transferred, a transfer switch for transferring the signal from the photoelectric conversion unit to the semiconductor area, and a read unit for reading out the signal from the semiconductor area, and a drive circuit for outputting a first level at which the transfer switch is set in an OFF state, a second level at which the transfer switch is set in an ON state, and a third level between the first level and the second level, wherein the drive circuit controls to hold the third level for a predetermined time while the transfer switch is changing from the ON state to the OFF state.
US07688368B2
An image sensor for capturing a color image is disclosed having a two-dimensional array having first and second groups of pixels, arranged in rows and columns, wherein pixels from the first group of pixels have narrower spectral photoresponses than pixels from the second group of pixels; and the placement of the first and second groups of pixels defining a pattern that has a minimal repeating unit including at least six pixels, so that at least some rows or columns of the minimal repeating unit are composed only of pixels from the second group and some rows or columns of the minimal repeating unit are composed only of pixels from the first group, wherein the rows or columns that are composed only of pixels from the first group are composed of at most two colors of pixels from the first group.
US07688361B2
A pixel signal output from a solid-state imaging device is converted into image data and recorded in a memory by a writing controller. A reading controller reads the image data from the memory by blocks and performs Y/C processing on the image data that has been read out by blocks. A JPEG processing section performs compression coding. The coded data is not recorded in the memory but is written on a recording medium by a DMA processing section.
US07688360B2
An imaging apparatus control unit, comprising a calculation block, a first control block, an output block, and a second control block, is provided. The calculation block calculates the number of possible photographs. The number of possible photographs is set as the sequential-photographing number. The first control block carries out imaging control for either sequential-photographing or single-photographing. The output block outputs the compressed image signal to the memory. The second control block either repeatedly carries out the sequential control for sequential-photographing, or stops carrying out the sequential control for sequential-photographing and begins carrying out the sequential control for single-photographing when the sequential-photographing number is below a first predetermined number.
US07688355B2
A method for storing images of a workpiece is provided. The method includes the steps of: (a) reading an image of the workpiece from the storage; (b) reading one byte of the three bytes' color information of each pixel of the image; (c) storing one by one the read one byte of the three bytes' color information of each pixel of the image in an array allocated by the storage; (d) obtaining a coordinate value of a center point of the image from the location file; (e) storing the coordinate value of the center point of the image and the array representing the image's color information as an object in a source file; and (f) repeating the steps (a) to (e) till all the images of the workpiece are read. A related system is also disclosed.
US07688348B2
The system and method relate to detection of objects that are submerged, or partially submerged (e.g. floating), relative to a water surface. One aspect of the invention emits LIDAR fan-beam pulses and analyzes return-pulse portions to determine water-surface orientations and derive submerged-object images corrected for refractive distortion. Another defines simulated images of submerged objects as seen through waves in a water surface, prepares an algorithm for applying a three-dimensional image of the water surface in refractive correction of LIDAR imaging through waves—and also models application of the algorithm to the images, and finally specifies the LIDAR-system optics. Yet another emits nearly horizontal pulses to illuminate small exposed objects at tens of kilometers, detects reflected portions and images successive such portions with a streak-tube subsystem. Still others make special provisions for airborne objects.
US07688344B2
Systems and methods for providing a status of a teleconference by determining an approximate delay time and providing a status signal in view of the determined approximate delay time are provided. An approximate delay time is approximately the amount of time that will elapse before an occurrence occurring at a first time, which is captured into an occurrence signal by a source unit, will be experienced at a second time after the occurrence signal is received by at least one receiving unit.
US07688343B2
A measuring device for measuring a length of a sheet includes a sheet-carrying unit for carrying a sheet, a reading unit having an area sensor and configured to repeatedly read the surface of the sheet from the leading end to the trailing end of the sheet while the sheet is being carried by the sheet-carrying unit, and a measuring unit for measuring the length of the sheet in the carrying direction on the basis of information regarding the sheet surface that is repeatedly read by the reading unit.
US07688329B2
A pixel color conversion method applied to an output device includes: providing a trainable database for storing a plurality of data values corresponding to a set of indexes for use performing pixel color conversion; regarding at least one source image, training the trainable database; and according to the plurality of data values corresponding to the set of indexes in the trainable database, converting source samples of a source image into target samples for being outputted by the output device.
US07688324B1
According to one embodiment, a graphics/video processor includes a memory controller. The memory controller includes a first arbiter that receives memory client requests to access a memory device, and a first memory buffer coupled to the first arbiter. The first arbiter stores client requests that are selected by the first arbiter. The memory controller also includes a second arbiter coupled to the first memory buffer and a second memory buffer coupled to the second arbiter. The second arbiter receives requests from the memory client requests stored in the first memory buffer. The second memory buffer stores the client requests selected by the second arbiter. Further, the memory controller includes a third arbiter coupled to the second memory buffer. The third arbiter provides access of the memory device to the client requests stored in the second memory buffer.
US07688316B2
A system and method for measuring a color parameter values of a display for calibration purposes. An initial measurement of the color parameter value from the display is performed. Next, a number of additional measurements is determined in response to the value of the initial color parameter value. The color parameter value of the display is measured by the number of additional measurements in order to determine an average color parameter value of the display which will be used for calibration purposes.
US07688310B2
A low-cost haptic feedback keyboard device for providing haptic feedback to a user for enhancing interactions in a displayed environment provided by a computer. The haptic keyboard device can be a keyboard having multiple keys, or can be a wrist rest or other attachment coupled to a keyboard. The device includes a housing that is physically contacted by the user and rests on a support surface. An actuator is coupled to the housing and applies a force to the housing approximately along an axis that is substantially perpendicular to the support surface, where the force is transmitted to the user contacting the housing. In one embodiment, the force is an inertial force that is output by moving an inertial mass. The keyboard device can be used in conjunction with another haptic device, such as a mouse, trackball, or joystick.
US07688305B2
The present invention provides, among other things, an information inputting tool that can be made space-saving and places small constraint on key touch actions. For that purpose, an information inputting tool of the present invention is provided with a reflection portion (11B) provided with a single or a plurality of reflection members (11C) having retroreflectivity, with an attaching gadget (11c, etc.) that attaches said reflection portion to a finger of an operator, and with a change mechanism (11S, 11a1, etc.) that changes the reflectance distribution of said reflection portion in accordance with a finger pressure applied to the finger end of said finger.
US07688302B2
A shift register includes plural stages of flip-flops. The last-stage flip-flop Fn and the flip-flop Fn−1 that is the preceding flip-flop thereof are reset by inputting thereto an output signal from the last-stage flip-flop. A delaying means is provided, between an output terminal Q of the last-stage flip-flop for outputting the output signal and an input terminal R of the last-stage flip-flop for receiving the output signal, for delaying an input of the output signal to the input terminal R. The flip-flop Fn is reset at same time or after the preceding flip-flop Fn−1 is reset. With this arrangement, it is possible to prevent malfunctions of circuits due to a failure to reset the flip-flops.
US07688297B2
A bistable electro-optic display has a plurality of pixels, each of which is capable of displaying at least three gray levels. The display is driven by a method comprising: storing a look-up table containing data representing the impulses necessary to convert an initial gray level to a final gray level; storing data representing at least an initial state of each pixel of the display; receiving an input signal representing a desired final state of at least one pixel of the display; and generating an output signal representing the impulse necessary to convert the initial state of said one pixel to the desired final state thereof, as determined from said look-up table. The invention also provides a method for reducing the remnant voltage of an electro-optic display.
US07688296B2
A cholesteric liquid crystal driving device according to the present invention includes a first driving circuit for displaying one part of the image data to be displayed by a cholesteric liquid crystal on a first scanning line by driving the cholesteric liquid crystal on the first scanning line in accordance with first and second cycles; and a second driving circuit for displaying the other part of the image data to be displayed by a cholesteric liquid crystal on a second scanning line by driving the cholesteric liquid crystal on the second scanning line in accordance with a third or fourth cycle.
US07688295B2
A display has plural pixel groups each having plural color pixels. In a given frame that is divided into a first sub-period and a second sub-period, a first signal is provided in the first sub-period to a pixel of a given color in a first pixel group, and a second signal is provided to the pixel in the second sub-period. The first signal is set to one of a first polarity and a second polarity, and the second signal is set to one of the first polarity and second polarity, wherein the first signal and the second signal form a first sequence. A pixel of the given color in a second pixel group that is adjacent the first pixel group is driven with a second sequence of signals that is the same as the first sequence.
US07688290B2
A display system in which the luminance of light-emitting elements in a light-emitting device is adjusted based on information on an environment. A sensor obtains information on an environment as an electrical signal. A CPU converts, based on comparison data set in advance, the information signal into a correction signal for correcting the luminance of EL elements. Upon receiving this correction signal, a voltage changer applies a predetermined corrected potential to the EL elements. Thus, this display system enables control of the luminance of the EL elements.
US07688282B2
According to one embodiment, an information processing apparatus that includes a display panel; a filter facing the display panel; and a drive section turns on the filter in response to driving start of the display panel.
US07688280B2
An expanded bit map display (“EBMD”) (10) for displaying an image (14) and a method of creating such for mounting the EBMD (10) to a building surface (12) is provided. The EBMD (10) is a large-scale colored light display comprising a plurality of intelligent light fixtures (16) having a microprocessor and a memory and mounted to the building surface (12). Each light fixture (16) is separately addressable and operable to store lighting characteristics or information. Groups of light fixtures (16) are in communication with a central processor operable to communicate control protocol.
US07688274B2
An antenna system includes a dielectric structure formed on a substrate; an antenna, partially within the dielectric structure, and supported by the dielectric structure; a reflective surface formed on the substrate. A shield blocks radiation from a portion of the antenna and from at least some of the dielectric structure. The shield is supported by the dielectric structure.
US07688268B1
The present invention is an improved antenna system. In an embodiment of the invention, the antenna system of the present invention may be a high-gain, low-profile wide-band antenna. Advantageously, the antenna system of the present invention may include a plate with reflecting elements to form a reflectarray antenna suitable for mounting on an aircraft. The reflectarray antenna of the present invention may be formed from a planar array of waveguides which may operate as a low loss, wide-band reflecting elements. Individual waveguides may be designed to scatter an incident field while impressing appropriate phase shifts in order to form a plane wavefront at the array aperture to produce a desired output signal. Waveguides may include ridges to employ vertical and horizontal polarization across a wide bandwidth operable at a high frequency, such as 10 GHz to 30 GHz.
US07688266B2
An antenna module includes a substrate; a ground element disposed on the substrate; a first antenna element disposed on the substrate; and a second antenna element disposed on the substrate. The first antenna element and the second antenna element are, respectively, capable of transmitting radio waves having a first polarization direction and a second polarization direction unparallel to each other. A spacing between a perimeter of the ground element and the first antenna element increases as a function of increasing distance from the second antenna element. A spacing between the perimeter of the ground element and the second antenna element increases as a function of increasing distance from the first antenna element.
US07688260B2
Method and apparatus for locating position of a mobile device in an assisted satellite positioning system is described. In one example, satellite measurement data is obtained from a plurality of satellites at a mobile device. Position of the mobile device is computed using the satellite measurement data. The position is sent to a cellular device via a wireless ad hoc network. In one example, the wireless ad hoc network comprises a BLUETOOTH communication link. In one example, the mobile device is configured to receive assistance data from a position server through the wireless ad hoc network. For example, the mobile device may comprise a housing configured to plug into a cigarette lighter connector of an automobile and the cellular device may comprise a cellular telephone without location-determination capabilities (i.e., the cellular telephone does not include an integrated GPS receiver).
US07688258B2
The present disclosure relates to a radio wave receiving system. The system includes an antenna that is operable for receiving a received signal. The received signal contains information. The radio wave receiving system also includes a reference signal generator that is operable for generating a reference signal. In addition, a selective output device is included that is operable for selectively outputting the received signal and the reference signal to a transmission path. The system also includes an information acquiring device that is operable for generating a signal component indicating a signal level difference between the received signal and the reference signal. The information acquiring device is further operable for acquiring the information from the signal component.
US07688249B2
A method for determination of precipitation types in the atmosphere is described, wherein an output signal, in particular a radar signal, having a transmitting frequency spectrum is transmitted, reflection signals formed by reflection of the output signals at precipitation particles at at least two atmospheric levels and having a reflection spectrum are detected, and wherein finally the characteristics of the reflection signals are analyzed.The method according to the invention is characterized in that on analyzing characteristics of the reflection signals a course of a difference frequency spectrum formed by transmission frequency and reflection frequency spectrum is analyzed resolved by altitude levels.
US07688246B2
A radio wave absorber for use in an electromagnetic field probe that measures an electromagnetic field by means of an antenna section provided therewith, the radio wave absorber including: a first end section; a second end section that is located at a position opposite the first end section; and an intermediate section that is located between the first and second end sections, the intermediate section having outer dimension and thickness that increase in accordance with a distance from the first end section toward the second end section.
US07688239B2
An A/D converter performs successive A/D conversion operations that are synchronized with respective periods of an externally supplied clock signal. A set of output digital data produced from the A/D converter, following each A/D conversion, is acquired a plurality of times in succession within an interval that extends to the start of the next A/D conversion operation. If identical sets of data are not obtained in the successive acquisitions, then it is determined that there is failure of the A/D converter due to loss of the external clock signal.
US07688223B2
System for assisting a driver of an industrial truck with the following features: transponders are arranged at predetermined points of the working area of the industrial truck, the transponders are designed so that they transmit a UHF signal upon receipt of a transmission signal, the industrial truck comprises at least one aerial for transmitting and/or receiving an LF signal, an evaluation unit is arranged on the industrial truck which, upon receipt of a signal, sends said signal to an electronic evaluation unit for the UHF signals, the evaluation unit is connected to an on-board computer in the industrial truck.
US07688202B1
A sensor system comprises a signal sensor configured to receive a plurality of event signals for an event, a processing system coupled to the signal sensor and configured to process the plurality of event signals to determine if the event is a threat and responsive to determining that the event is a threat generate a threat message identifying the event, and an interface system coupled to the processing system and configured to transmit the threat message to a control system.
US07688182B2
An integrated circuit chip includes a rectifier circuit configured to convert an alternating voltage supplied from an antenna into a direct-current voltage, a nonvolatile memory coupled to the rectifier circuit to operate by use of the direct-current voltage, a sensor circuit coupled to the rectifier circuit to operate by use of the direct-current voltage to collect measurement data, and a logic circuit configured to control the nonvolatile memory and the sensor circuit such that an access operation of the nonvolatile memory and a data collecting operation of the sensor circuit are not performed concurrently.
US07688179B2
A hands-free vehicle door opener utilizes a spring-loaded mechanical pushing device, or other method, to open a vehicle door a few inches upon a laser emitting device sensing a foot in its emitted laser. The laser is emitted from the laser emitter upon the key fob of a smart key being validated by the vehicle's smart key validation system when a user approaches the vehicle with the smart key fob. When the laser beam is interrupted, a signal is sent from a smart ECU to a door lock ECU, which unlocks the vehicle door. Next, a signal is sent to a door open ECU to unlatch the vehicle door. Upon door unlatching, the spring-loaded pushing device pushes open the vehicle door. Instead of a laser emitting device being used as the sensor, a device with electrical contacts, an ultrasonic wave emitting sensing device, or other device could be used.
US07688169B2
A long-proportional-stroke force motor which outputs force proportional to the exciting current. The motor has a magnetic circuit wherein a non-magnetic spacer is positioned axially between a magnetic guide and a magnetic sleeve. An armature moves within a central opening defined by the guide, the spacer and the sleeve. An end portion of the guide, adjacent to the spacer, has a sectional profile through a stepped surface facing radially outward and the corners of the steps define a curve which satisfies the following expressions: ⅆ Y ⅆ X > 0 , ⅆ 2 Y ⅆ X 2 > 0 , where X is a coordinate on an X-axis corresponding to a central axis of the guide; wherein the armature is moved in a direction along the X-axis by application of exciting current to a coil surrounding the guide, spacer and sleeve; and Y is a coordinate on an axis orthogonal to the X-axis.
US07688168B2
Linear actuators (also known as an inchworm actuator) including a magnetically actuatable shape memory alloy (SMA) are described. The linear actuators include a bar and an actuator assembly, configured to achieve a linear displacement of the actuator assembly relative to the bar. A hybrid magnetic trigger including an electromagnet and a permanent magnet is used to selectively attract the magnetically actuatable SMA toward the magnetic trigger. The motion of the magnetically actuatable SMA can be converted to a linear displacement. The magnetically actuatable SMA can be implemented using a SMA exhibiting both ferromagnetic and SMA properties, or by a ferromagnetic mass coupled with an SMA (i.e., a ferromagnetic SMA composite). Linear actuators including bars incorporating a ratchet mechanism, and featureless bars are described. A hydraulic system incorporating actuators including magnetically actuatable SMA membranes is also disclosed.
US07688162B2
A microstrip filter having a plurality of hairpin microstrip resonators each having two substantially rectangular legs connected at one end and generally configured in a “U” shape. The microstrip filter may comprise a first of the plural resonators operatively connected to a first feed point, a second of the plural resonators operatively connected to a second feed point, and a third of the plural resonators operatively connected between the first and second resonators where an end portion of one of the legs of one of the resonators is tapered so that a thickness of the one leg is greater at one end of the one leg than at another end of the one leg.
US07688159B2
A SAW duplexer includes a first SAW filter having a passband with a relatively low frequency, and a second SAW filter having a passband with a relatively high frequency. The first and second SAW filters each have a ladder-shaped circuit configuration. A bridging inductor is connected in parallel to at least one serial arm resonator in the second SAW filter. The bridging inductor includes a coiled portion provided on a multilayer package substrate. The coiled portion is defined by connecting first to third wires provided on first to third layers by via-hole conductors. First, third, and fifth via-hole conductors that define a coil return wire portion are disposed inside the coiled portion.
US07688139B2
A method of processing a signal is disclosed. The method comprises generating a digital signal, converting the digital signal to an analog signal, and generating an amplified analog signal having distortions. The method further comprises converting the amplified analog signal to a feedback digital signal at a sample rate and updating a model of the distortions based on the feedback digital signal.
US07688138B2
An electronic device includes a nonlinear power amplifier, a predistortion coefficient calculator, and a memory polynomial predistortion filter coupled to the nonlinear power amplifier and to the predistortion coefficient calculator. The memory polynomial predistortion filter may include a plurality of finite impulse response (FIR) filter stages, and a summer coupled to the plurality of FIR filter stages. The FIR filter stages may functionally operate in parallel or may include a series of FIR filters coupled in parallel.
US07688127B2
A device and a method for generating a output clock signal having a output cycle, the method includes: (i) adjusting a delay of an adjustable ring oscillator to provide a high frequency clock signal having a short cycle so that the output cycle substantially equals a sum of integer multiples of a sleep cycle and integer multiplies of the short cycle; wherein the output cycle differs from any integer multiples of the sleep cycle; wherein the sleep cycle characterizes a sleep clock signal that is generated by a low frequency sleep clock; wherein the short cycle is shorter than the sleep cycle; (ii) counting short cycles and sleep cycles; and (iii) generating, during a sleep mode, in response to the counting and to a predefined counting pattern, the first clock signal; wherein the generating includes activating the adjustable ring oscillator only during a portion of a single sleep cycle per each output cycle.
US07688125B2
Various systems and methods for comparing signals are disclosed herein. For example, some embodiments of the present invention provide comparator circuits with a preamplifier circuit, a latch circuit and a current re-use circuit. The current re-use circuit applies a current to the preamplifier circuit during a transparent phase, and applies a similar current to the latch circuit during a latch phase.
US07688120B2
An output driver of a semiconductor memory device is capable of controlling falling and rising edges of an output data. The output driver prevents the first output data form being relatively deteriorated compared with other output data in case that the output data are terminated centering around a predetermined voltage level. The output driver includes a pull-up driver for pull-up driving an output terminal in response to a pull-up control signal, a pull-down driver for pull-down driving the output terminal in response to a pull-down control signal, a first acceleration driver for accelerating the pull-up control signal, and a second acceleration driver for accelerating the pull-down control signal, wherein the first and second acceleration drivers are activated when a first data is outputted.
US07688112B2
Protection against anti single event effects associated with strikes of energetic particles is provided in current-mode logic (CML) or similar integrated circuits (ICs) using a current-switching architecture.
US07688107B2
The present invention provides a shift register which can operate favorably without providing a level shift portion. The first clocked inverter at the (2n−1)-th stage operates in accordance with the first output from the previous stage, an output from the second clocked inverter at the previous stage, and the first CK signal; the second clocked inverter at the (2n−1)-th stage operates in accordance with the second output from the previous stage, an output of the first clocked inverter at the (2n−1)-th stage, and the first CK signal; one of the first output and the second output is equal to a potential of VDD and the other is equal to a potential of VSS; the first CK signal at the 2n-th stage operates the third output from the (2n−1)-th stage, an output of the second clocked inverter and the second CK signal; the second clocked inverter at the 2n-th stage operates in accordance with the fourth output from the (2n−1)-th stage, an output from the first clocked inverter at the 2n-th stage, and the second CK signal; one of the third output and the fourth output is equal to the potential of VDD and the other is equal to the potential of VSS, and the second CK signal is an inversion signal of the first CK signal and the amplitude of the CK signal is smaller than the power supply potential.
US07688100B2
A method for evaluating a quiescent current, the method includes: measuring, when a module is at a first mode, a first voltage drop on a first resistor that is coupled between a supply pin of an integrated circuit that comprises the module and a first test pin of the integrated circuit; assessing, when the module is at a second mode, a second voltage drop on a second resistor that is coupled between the supply pin and a second test pin of the integrated circuit; and evaluating a quiescent current of the module in response to the first and second voltage drops; wherein expected values of quiescent current of the module differ from one mode to the other; and wherein a resistance of the first resistor differs from the resistance of the second resistor.
US07688097B2
The present invention relates to a probe tip assembly for testing of integrated circuits or other microelectronic devices. The probe tip assembly may include a plurality of independently flexible contact fingers extending from a support, each contact finger spaced apart from the other contact fingers, and each contact finger terminating in free space at an end distal from the support. A probe may be constructed by attaching the free ends of the contact fingers to electrical contacts on a circuit board and then removing the support from the contact fingers.
US07688096B2
An inspecting apparatus is provided for inspecting electrical characteristics of an object (W) to be inspected, such as a semiconductor wafer. The inspecting apparatus is provided with a placing table (11) for supporting the object, a lift mechanism (12) for bringing up and down the placing table, and a driving apparatus (24) for driving the lift mechanism. The apparatus is also provided with a probe (13A) which makes contact with the object on the placing table brought up by the lift mechanism driven by the driving apparatus, and a load sensor (21), including a compression-type piezoelectric element, for detecting a contact load between the object and the probe as an oscillation waveform.
US07688095B2
Flexible and rigid interposers for use in the semiconductor industry and methods for manufacturing the same are described. Auto-catalytic processes are used to minimize the costs associated with the production of flexible interposers, while increasing the yield and lifetime. Electrical contact regions are easily isolated and the risk of corrosion is reduced because all portions of the interposer are plated at once. Leads projecting from the flexible portion of the interposers accommodate a greater variety of components to be tested. Rigid interposers include a pin projecting from a probe pad affixed to a substrate. The rigidity of the pin penetrates oxides on a contact pad to be tested. Readily available semiconductor materials and processes are used to manufacture the flexible and rigid interposers according to the invention. The flexible and rigid interposers can accommodate pitches down to 25 μm.
US07688094B2
In an electrical connecting apparatus, a first guide is arranged in a plate-shaped lower base in which the contactors are arranged. The first guide has a first space for guiding a device under test so that its electrodes will contact the tips of contactors and for positioning the device under test against the contactors. The device under test is guided to the first space by second guides and is received and thrust by the tips of the contactors. By doing so, displacement of the device under test caused by displacement of the upper base or the second guides is prevented.
US07688093B2
The invention relates to a device interface board for testing chips, which is cooperatively installed with one of a plurality of probe cards. Each of the plurality of probe cards is provided with a specified wiring area and a first public signal area, the specified wiring area being electrically connected with the first public signal area. The first public signal area of each of the plurality of probe cards is located in a same particular area, and the specified wiring area of each of the plurality of probe cards is electrically connected with a testing jig and is different depending on a different testing jig. The device interface board comprises a chip test area and a second public signal area, in which the chip test area is used to carry a chip under test and is electrically connected with the second public signal area, whereby, through electrical connection between the device interface board and the first public signal area of each of the plurality of probe cards, test signals are transferred between the testing jig and the chip under test, and testing of chips under test having the same model are accomplished between different testing jigs.
US07688088B2
At least one pair of electrode formed on a mounting surface of a stage is in contact with a conductive layer formed on a first surface of an inspection object, and an electrical path is formed between the both by using a fritting phenomenon.
US07688087B2
An under testing device interface with mixed-signal processing circuit is disclosed. The under testing device interface with mixed signal processing circuit software of integrates the mixed-signal processing circuit into the probe card or device under testing card, the mixed-signal processing circuit with the pin electric channel of the tester, and the programs for handling the process of mixed-signal processing circuit into the system software of the tester.
US07688083B2
A method of obtaining parametric test data for use in monitoring alignment between layers of a semiconductor device. The method employs a test structure comprising a meander (10, 30) of the material of a first layer of the semiconductor device, deposited relative to a conductive line (18,38). A number of sets (16a, 16b, 16e, 16d) of components 16, such as contacts or vias, are provided relative to the meander (10), at successively smaller distances therefrom. A single analogue measurement can be performed between a first and (A) of the meander (10, 30) and the conductive line (18, 38) so as to determine the resistance therebetween, and the critical distance at (or on acceptable margin in relation thereto) between the first layer and a component of the semiconductor device can be obtained.
US07688080B2
A capacitance sensing apparatus includes capacitance sensor elements covered by a layer of material. The layer of material has an uneven effect on a measure of capacitance induced in the capacitance sensor elements when an object is in proximity to a sensing surface. For example, the layer of material may have a non-uniform thickness, or a property of the material may be non-uniform across the layer. The capacitance sensor elements are dimensioned to compensate for the effect.
US07688078B2
A system or method for counting the number of layers of a multilayer object is adapted for counting the number of layers by means of a simple arrangement of emitting an electromagnetic wave to strike the object that is in a multilayer state. In the system or method, an electromagnetic wave is caused to strike at least either the top surface or the bottom surface of a multilayer object and electromagnetic waves generated by reflection of the incident electromagnetic wave at the respective interfaces of the layers of the multilayer object or an electromagnetic wave generated by transmission of the electromagnetic wave through the multilayer object.
US07688074B2
A battery monitor is provided for use with a battery of an automotive vehicle. The battery monitor can provide real time battery condition measurements and can selectively control the charging of the battery through an alternator of the vehicle based upon the measured battery condition.
US07688073B2
A diagnosis device of a capacitor discharge ignition device for an engine that detects, as a singularity, a leading edge or a trailing edge of a voltage between output terminals of an ignition power supply portion that generates a voltage for charging an ignition capacitor, counts the number of singularities detected while a crankshaft rotates through a measurement section, which is a section of a certain crank angle determined with reference to a pulse signal obtained by a signal generator that generates a pulse signal at a specific crank angle position of an engine, and diagnoses an abnormality of the ignition device and a cause of the abnormality by comparing the count value of singularity with the number of times of normal ignition of the engine performed while the crankshaft rotates through the measurement section.
US07688059B2
There is provided a filter characteristic adjusting apparatus and a filter characteristic adjusting method which can avoid an increase in circuit scale of the filter characteristic adjusting apparatus, and can speedily adjust a characteristic frequency of the filter to a desired frequency. When performing characteristic adjustment for the filter, the test signal generation unit (31) generates a test signal (s14) which is a pulse signal having the same frequency as the characteristic frequency of the filter (10) on the basis of a reference signal (s17), and a phase-shifted test signal (s14′) that is obtained by shifting the phase of the test signal (s14) by a predetermined amount with a phase shift unit (32) in a control signal generation unit (33) is compared with a filter output signal (s16) that is obtained by inputting the test signal (s14) into the filter (10) to obtain a phase difference between the signals, and then the phase difference is subjected to a binary search to generate a control signal (s11).
US07688050B2
A switching power supply controller has a nominal loop gain and transient loop gain that is only activated in response to an abrupt load change in one direction. The transient loop gain may be implemented with a series-connected diode and resistor combination arranged in a feedback configuration with an error amplifier. A large load change in one direction may swing the output of the error amplifier and forward bias the diode to create a non-linear gain change.
US07688038B2
A battery charging apparatus connects secondary batteries of the battery pack, plurality of charge terminals and two discharge terminals to form plurality charge paths and a discharge path, which has a main switch provided on the discharge path, a main controller connecting the battery pack and the main switch, plurality of sub switches provided on the charge paths, plurality of sub controllers connecting secondary batteries of the battery pack and corresponding sub switches, a thermal controller connecting the main controller and a temperature switch. The temperature switch connects the sub switches. The main controller and sub controllers monitor charge state and discharge state of the battery pack to set the main switch and sub switches cut off the discharge path and the charge paths. The thermal controller monitors temperature of the battery pack and main switch to set the main switch and the sub switches cut off the discharge path and the charge paths.
US07688036B2
A self-recharging battery comprising a generator and an energy storage device contained within the battery case. The generator comprises a magnetic structure configured to generate a compressed magnetic field and a coil configured to focus the compressed magnetic field in electrical conductive elements of the coil.
US07688028B2
A cordless system has cordless system components that include a cordless device, such as a cordless power tool, a battery pack and a charger. The battery pack is mated with either the cordless device to provide power to operate the cordless device or to the charger to charge the battery cells in the battery pack. In an aspect, the cordless system has an identification and communication system by which the battery pack identifies and communicates information about the battery pack to the cordless device or to the charger to which the battery pack is mated. In an, the battery pack of the cordless system is capable of multiple modes, such as controlling the cordless device and controlling the charger. In an aspect, the battery pack validates the cordless device or charger to which it is mated in an aspect of the invention, the cordless system uses any of a wired interface, radio frequency interface, an optical interface or a magnetic interface to communicate information between the battery pack and the cordless device or charger to which the battery pack is mated. In an aspect, female terminals are used in a terminal block of the battery pack to protect against foreign objects contacting the terminals. In aspect, the terminals in the terminal block of the battery pack are staggered or scattered to reduce the likelihood of a short circuit. In an aspect of the invention, the battery pack has a trap door that closes when the battery pack is not mated to a cordless device or charger to protect the terminal block of the battery pack. In an aspect of the invention, multi-spring, split contact terminals are used in the terminal block of at least one of the cordless system components. In an aspect of the invention, the battery cells are Lithium Ion battery cells.
US07688027B2
A charger configured to charge batteries includes a housing including a plurality of battery storage chambers accommodating the batteries, the battery storage chambers being aligned in a horizontal direction such that depth directions of the battery storage chambers are parallel to each other; openings formed on first ends of the battery chambers in the depth direction, the batteries being attached to and detached from the battery storage chambers through the openings; and charger-side terminals provided on the battery storage chambers, the charger-side terminals being connect to and disconnect from battery-side terminals of the batteries stored in the battery storage chambers.
US07688023B2
Disclosed is a battery pack management method for HEV and EV. Power for a control signal is applied to a relay of a battery pack connection circuit through a battery management system (BMS) or vehicle control device. Then, current or voltage from a pre-charge resistor of the battery pack connection circuit is detected. Thereafter, the detected current or voltage is compared with standard correspondence information pre-stored in a memory unit of the BMS to determine whether the detected value is within a normal range of the battery pack. A connection between the battery pack and the power conversion circuit is carried out when the detected value is within the normal range as a result of the determination, otherwise a pre-charge relay of the battery pack connection circuit is turned off and then a driver is provided with a warning signal.
US07688020B2
A step motor driving circuit is provided. An exemplary step motor driving circuit includes an input voltage source set, a reference voltage source, a voltage level shift unit, a logic unit, a reset voltage source, and an output voltage terminal. The input voltage source set provides an input voltage set. The reference voltage source provides a reference voltage. The voltage level shift unit raises one of the levels of the input voltage set to a level of the reference voltage. The logic unit receives the reference voltage and the input voltage set and outputs a control voltage. The reset voltage source outputs a reset voltage to reset the logic unit. The output voltage terminal receives the control voltage and outputs an output voltage.
US07688017B2
In at least one aspect, a second multi-axis vacuum motor assembly is provided. The second multi-axis vacuum motor assembly includes (1) a first rotor; (2) a first stator adapted to commutate so as to rotate the first rotor across a vacuum barrier and control rotation of a first axis of a robot arm within a vacuum chamber; (3) a second rotor below the first rotor; (4) a second stator below the first stator and adapted to commutate so as to rotate the second rotor across the vacuum barrier and control rotation of a second axis of the robot arm within the vacuum chamber; (5) a first feedback device adapted to monitor rotation of the first axis of the robot arm; and (6) a second feedback device adapted to monitor rotation of the second axis of the robot arm. Numerous other aspects are provided.
US07688012B2
A method for determining the torque of an electric machine, in particular a permanently energized electric machine. The torque is determined by a particularly simple and accurate method by measuring a phase voltage and the rotational speed of the electric machine and calculating the torque based on these values.
US07688011B2
A control circuit for an electronically commutated motor (120), having a power stage (122) that comprises at least two semiconductor switches (216, 218) to influence the motor current. The semiconductor switches are controllable by way of commutation signals. The control circuit comprises a current measuring element (170) to make available a motor current control variable (I) dependent on the motor current, a base diode (240) that is arranged in series with the current measuring element and between the current measuring element and the at least two semiconductor switches, and a motor current setting element (180) with which the commutation signals can be influenced as a function of the motor current control variable.
US07688010B2
Preferred embodiments of the invention comprise an automatic reel capable assisting a user when attempting to unspool a linear material, such as a water hose. The automatic reel includes a control system having a motor controller capable of sensing a pulling of, or increased tension of, the linear material and capable of causing a motor to rotate to unspool the linear material. In certain embodiments, the motor controller tracks the length of the unspooled portion of the linear material and/or reduces the spooling speed of the motor when retracting a terminal portion of the linear material.
US07688009B2
In one embodiment, an LED current control circuit is configured with a sample and hold circuit that samples an error signal of an error amplifier during one time and holds the sampled value during a second time.
US07688005B2
A lighting control system is provided for a space that is equipped with multiple lamps for illuminating the space and multiple power circuits for supplying power to different groups of the lamps. The control system stores information relating to the past illumination of the lamps in each of the different groups. The system detects conditions or events that indicate that increased illumination of the space by the lamps is needed, and produces a control signal in response to the detection of a condition or event that indicates that increased illumination of the space by the lamps is needed. In response to the control signal, the system supplies power to at least one of the power circuits, which is selected on the basis of the stored information, to turn ON the group of lamps receiving electrical power from that power circuit.
US07688004B2
The invention relates to a device (1) for switching a lamp (2, 3) on and off that is controlled by a digital control input DALI. According to the invention, a load current monitoring is ensured.
US07687997B2
The subject of the present invention relates to a high efficiently dielectric barrier discharge (DBD)-lamp for generating and/or emitting a radiation of ultraviolet (UV)-light comprising: a discharge gap (1) being at least partly formed and/or surrounded by at least an inner wall (2) and an at least partly transparent (3), each with an inner surface (2a, 3a), facing the discharge gap (1) and an outer surface (2b, 3b) arranged opposite of and directed away from the corresponding inner surface (2a, 3a), a filling located inside the discharge gap (1), at least two electrical contacting means (4), a first electrical contacting means (4a) at the inner wall (2) and a second electrical contacting means (4b) at the outer wall (3), and at least one luminescent coating layer (5) arranged at/on and at least partly covering at least a part of the respective wall's inner surface (3a), arranged such, that at least a part of the generated UV-light of a certain wavelength range can pass the luminescent coating layer (5) from the discharge gap (1) to the outside of the DBD-lamp, whereby at least one of both walls (2, 3) is at least partly arranged with directing means (6), so that the diffusive radiation is directed in direction through the transparent part of the outer wall (3) with reduced losses due to absorption effects and the like.
US07687996B2
A compound body has a first body part (15) made of glass and a mechanical connection (20, 60) which is melted on the first body part (15) and contains aluminum.
US07687995B2
Provided is a display apparatus that includes a panel assembly having a front panel and a rear panel coupled to the front panel and a plurality of discharge electrodes to which power is applied; a chassis base assembly that is combined with the panel assembly and on which a driving circuit unit is formed; a plurality of signal transmitting units that electrically connect the discharge electrodes and the driving circuit unit; and a silicon protection member which is formed on at least an end of each of the signal transmitting units to surround connection portions between the signal transmitting units and the discharge electrodes of the driving circuit unit, and comprises a silicon layer that seals the connection portions from the outside and an electromagnetic wave shielding material that is mixed in the silicon layer to block electromagnetic waves generated by the discharge electrodes or the driving circuit unit and has an electromagnetic wave shielding range from 1 to 200 dB. The display apparatus can prevent yellowing, and at the same time, can block electromagnetic waves.
US07687989B2
An emissive display device, including: a reflective electrode and a transparent electrode. One or more light-emitting layers are formed between the reflective and transparent electrodes. A scattering layer is positioned in the emissive display device to scatter light trapped in the one or more light-emitting layers; and a circular polarizer is located on the side of the scattering layer opposite the reflective electrode.
US07687984B2
An organic light emitting display device including a thin film transistor in first and second regions on a transparent insulating substrate, a lower anode coupled to the thin film transistor, a reflective layer pattern formed on the lower anode in the first region, an upper anode formed on the reflective layer pattern in the first region and on the lower anode in the second region, and an organic layer formed on the upper anode in the first and second regions.
US07687980B2
A spark plug comprises: a spark plug housing; an axial core electrode disposed in a longitudinal direction in the spark plug housing; and a ground electrode having a terminal part spaced apart along the longitudinal direction from a distal end of the axial core electrode and disposed in a perpendicular relation with the axial core electrode, the terminal part having a circular through hole formed along an axis coaxial with the axial core electrode, the circular through hole having a tapered inner surface and including a plurality of spiral protrusions disposed on the tapered inner surface to induce a turbulent air flow in the combustion inflow.
US07687976B2
An ultrasound imaging system (100). An exemplary system (100) includes a plurality of transducer elements (136) formed in subarrays (140) and a plurality of subarray circuit units (160′), with each circuit unit (160′) connected to a subarray (140) of the transducer elements (136). The circuitry in each unit (160′) comprises a plurality of integrated circuits (330, 340, 350), with at least a first (340) of the integrated circuits formed over a second (330) of the integrated circuits in a stacked configuration. In an example illustration the first integrated circuit (340) includes a first plurality of first bond pads (345) along a surface (342) thereof and the second integrated circuit (330) includes a second plurality of second bond pads (335) along a surface (331) thereof, with bond wires (344) extending between pairs of first and second bond pads to provide input/output signal connections therebetween.
US07687949B2
A rotor of a synchronous reluctance motor is provided. The rotor may include a laminated core including a plurality of laminated silicon steel sheets being equally divided into a plurality of regions with respect to a central portion of the plurality of silicon steel sheets. Each of the plurality of regions may include a plurality of barriers. Guide pin holes may be formed between adjacent regions so as to receive guide pins therethrough to align the plurality of silicon steel sheets and end caps provided at opposite ends thereof. Rivets may penetrate receiving holes formed at corresponding barriers in each of the respective regions so as to couple the laminated core and the end caps.
US07687946B2
A spindle motor is disclosed. The spindle motor includes a base including a PCB, a bearing housing installed on the base and having a bearing therein, a rotating shaft rotatably supported by the bearing, a stator including a core arranged around the bearing housing and a coil wound around the core, a rotor including a rotor yoke supported by the rotating shaft and a magnet coupled to the rotor yoke, and a stopper supported by the base at an outer side of the rotor yoke, and partially located above a portion of the rotor yoke to inhibit the rotor yoke from moving upward.
US07687923B2
The present invention provides a semiconductor device package, comprising a die having a back surface and an active surface formed thereon; an adhesive layer formed on the back surface of the die; a protection substrate formed on the adhesive layer; and a plurality of bumps formed on the active surface of the die for electrically connection. The present invention further provides a method for forming a semiconductor device package, comprising providing a plurality of die having a back surface and an active surface on a wafer; forming an adhesive layer on the back surface of the die; forming a protection substrates on the adhesive layer; forming a plurality of bumps on the active surface of each die; and dicing the plurality of die into individual die for singulation.
US07687919B2
An integrated circuit package system includes an arched pedestal integrated circuit die including an active surface, a die mounting surface, a pedestal portion including an arch intersecting the die mounting surface and having an arch height, and the arch under a portion of the active surface and having an arch width less than the arch height.
US07687905B2
An integrated circuit package includes a first capacitor supported by a surface of a substrate, and a second capacitor supported by the surface of the substrate. The first capacitor is within a die shadow region, and the second capacitor lies outside of the die shadow region.
US07687895B2
A workpiece has at least two semiconductor chips, each semiconductor chip having a first main surface, which is at least partially exposed, and a second main surface. The workpiece also includes an electrically conducting layer, arranged on the at least two semiconductor chips, the electrically conducting layer being arranged at least on regions of the second main surface, and a molding compound, arranged on the electrically conducting layer. In the molding compound a contact via is arranged.
US07687891B2
A semiconductor device includes a first layer having a first conductivity type, a second layer having a second conductivity type, a third layer having the second conductivity type, one or more first zones having the first conductivity type and located within the second layer, wherein each one of the one or more first zones is adjacent to the third layer, and one or more second zones having the second conductivity type and located within the second layer, wherein each one of the one or more second zones is adjacent to one or more of the one or more first zones.
US07687889B2
The present invention relates to a light emitting display device, such as an organic electroluminescent device, and a method for manufacturing the same. Particularly, the present invention relates to reducing electrical resistance between the scan lines and the cathode electrode layers so that scan line signals do not degrade significantly degrade. One way to achieve this is to use materials to form the conducting layers of the scan line and the cathode electrode layers such that the conductivities of the conducting layers and the cathode electrode layer are as identical as possible. For example, if a same metal such as aluminum is used to form both the conducting layer and the cathode electrode layer, the resistance would be significantly lowered. In addition, a large contacting area may be provided.
US07687880B2
A fuse corner pad is part of an integrated circuit that includes a built-in fuse contact and a plurality of auxiliary pads. The fuse contact is a conductive metallic or metalloid structure that is connected to a fuse element. The fuse contact and fuse element are used inside of the fuse corner pad for programmability (e.g., for security) and/or adjustment (e.g., trimming) of analog and/or digital signals. The fuse contact and fuse element are not required to be bonded to an external electrical connection (such as, a pin or ball). The auxiliary pads provide a variety of functional or non-functional applications, such as testing, probing, programming, and/or circuit adjustment.
US07687877B2
An interconnect structure is provided that includes a dielectric material 52′ having a dielectric constant of 4.0 or less and including a plurality of conductive features 56 embedded therein. The dielectric material 52′ has an upper surface 52r that is located beneath an upper surface of each of the plurality of conductive features 56. A first dielectric cap 58 is located on the upper surface of the dielectric material 52′ and extends onto at least a portion of the upper surface of each of the plurality of conductive features 56. As shown, the first dielectric cap 58 forms an interface 59 with each of the plurality of conductive features 56 that is opposite to an electrical field that is generated by neighboring conductive features. The inventive structure also includes a second dielectric cap 60 located on an exposed portion of the upper surface of each of the plurality of conductive features 56 not covered with the first dielectric cap 58. The second dielectric cap 60 further covers on an exposed surface of the first dielectric cap 58.
US07687876B2
The present invention provides for nanostructures grown on a conducting substrate, and a method of making the same. The nanostructures grown according to the claimed method are suitable for manufacturing electronic devices such as an electron beam writer, and a field emission display.
US07687873B2
A photodiode comprises a support substrate, an insulating layer formed over the support substrate, a silicon semiconductor layer formed over the insulating layer and having a device forming area and device isolation areas which surround the device forming area, a device isolation layer formed in the device isolation areas, a P+ diffusion layer formed in the device forming area close to one edge lying inside the device isolation layer by diffusing a P-type impurity in a high concentration, an N+ diffusion layer spaced away from the P+ diffusion layer and formed in the device forming area close to the other edge opposite to the one edge of the device isolation layer by diffusing an N-type impurity in a high concentration, a low concentration diffusion layer formed in the device forming area located between the P+ diffusion layer and the N+ diffusion layer by diffusing an impurity of the same type as either one of the P+ diffusion layer and the N+ diffusion layer in a low concentration, and silicide layers respectively formed above the P+ diffusion layer and the N+ diffusion layer with being spaced away from a boundary between the low concentration diffusion layer and the P+ diffusion layer and a boundary between the low concentration diffusion layer and the N+ diffusion layer.
US07687872B2
An image sensor including photosensitive cells including photodiodes and at least one additional circuit with a significant heat dissipation including transistors. The image sensor is made in monolithic form and includes a layer of a semiconductor material having first and second opposite surfaces and including, on the first surface side, first regions corresponding to the power terminals of the transistors, the lighting of the image sensor being intended to be performed on the second surface side; a stack of insulating layers covering the first surface; a thermally conductive reinforcement covering the stack on the side opposite to the layer; and thermally conductive vias connecting the layer to the reinforcement.
US07687867B2
A method to integrate MIM capacitors into conductive interconnect levels, with low cost impact, and high yield, reliability and performance than existing integration methods is provided. This is accomplished by recessing a prior level dielectric for MIM capacitor level alignment followed by deposition and patterning of the MIM capacitor films. Specifically, the method includes providing a substrate including a wiring level, the wiring level comprising at least one conductive interconnect formed in a dielectric layer; selectively removing a portion of the dielectric layer to recess the dielectric layer below an upper surface of the at least one conductive interconnect; forming a dielectric stack upon the at least one conductive interconnect and the recessed dielectric layer; and forming a metal-insulator-metal (MIM) capacitor on the dielectric stack. The MIM capacitor includes a bottom plate electrode, a dielectric and a top plate electrode. The bottom and top plate electrodes can comprise the same or different conductive metal.
US07687853B2
A semiconductor device includes one or more LDMOS transistors and one of more SCR-LDMOS transistors. Each LDMOS transistor includes a LDMOS well of a first conductivity type, a LDMOS source region of a second conductivity type formed in the LDMOS well, and a LDMOS drain region of a second conductivity type separated from the LDMOS well by a LDMOS drift region of the second conductivity type. Each SCR-LDMOS transistor comprising a SCR-LDMOS well of the first conductivity type, a SCR-LDMOS source region of the second conductivity type formed in the SCR-LDMOS well, a SCR-LDMOS drain region of a second conductivity type, and a anode region of the first conductivity type between the SCR-LDMOS drain region and the SCR-LDMOS drift region. The anode region is separated from the SCR-LDMOS well by a SCR-LDMOS drift region of the second conductivity type.
US07687846B2
Disclosed are nonvolatile memory devices and methods of fabricating the same. A nonvolatile memory device can include a field isolation film configured to define active regions in a substrate and a wordline configured to intersect the active regions. Devices can also include source and drain regions formed in each of the active regions at both sides of the wordline and a source line configured to extend along the wordline under the source region. Devices can further include a join region configured to connect the source region with the source line.
US07687843B2
A process for producing structures in a semiconductor zone, has the steps of a) producing a trench (2) in the semiconductor zone (18), b) filling the trench with a photoresist (19), and c) exposing the photoresist (19) using ion beams (20), d) developing the photoresist (19). The energy density and ion dose for the ion beams (20) are selected in such a way that the photoresist (19) is only chemically changed at defined depths, so as to produce two regions, in the first region (21) of which the photoresist has been chemically changed at the defined depths by the ion beams (20), and in the second region of which the photoresist has been left chemically unchanged, so that during the developing step the photoresist is removed in precisely one of the two regions.
US07687838B2
Provided are a resistive memory device having a probe array and a method of manufacturing the same. The resistive memory device includes a memory part having a bottom electrode and a ferroelectric layer sequentially formed on a first substrate; a probe part having an array of resistive probes arranged on a second substrate, with the tips of the resistive probes facing the ferroelectric layer so as to write and read data on the ferroelectric layer; and a binding layer which grabs and fixes the resistive probes on or above the ferroelectric layer. The method of manufacturing the resistive memory device includes forming a bottom electrode and a ferroelectric layer sequentially on a first substrate; forming an array of resistive probes on a second substrate; and wafer level bonding the first substrate to the second substrate using a binding layer such that tips of the resistive probes face the ferroelectric layer.
US07687836B2
A conductive shield plane electrically isolating the photodiode regions from metal interconnect lines in an imager sensor device.
US07687828B2
A field-effect transistor has a so-called double heterostructure which is formed such that a channel layer through which electrons travel is provided between an electron supply layer and a liner layer, wherein a forbidden band width of the liner layer and a forbidden band width of the electron supply layer are broader than a forbidden bandwidth of the channel layer.
US07687827B2
Semiconductor structures including one, or more, III-nitride material regions (e.g., gallium nitride material region) and methods associated with such structures are provided. The III-nitride material region(s) advantageously have a low dislocation density and, in particular, a low screw dislocation density. In some embodiments, the presence of screw dislocations in the III-nitride material region(s) may be essentially eliminated. The presence of a strain-absorbing layer underlying the III-nitride material region(s) and/or processing conditions can contribute to achieving the low screw dislocation densities. In some embodiments, the III-nitride material region(s) having low dislocation densities include a gallium nitride material region which functions as the active region of the device. The low screw dislocation densities of the active device region (e.g., gallium nitride material region) can lead to improved properties (e.g., electrical and optical) by increasing electron transport, limiting non-radiative recombination, and increasing compositional/growth uniformity, amongst other effects.
US07687824B2
A heating process is performed in a nitrogen atmosphere at a temperature of not less than 1650° C. upon an epitaxial substrate including a single crystal base and an upper layer made of a group-III nitride crystal and epitaxially formed on a main surface of the single crystal base. The result shows that the heating process reduces the number of pits in a top surface to produce the effect of improving the surface flatness of the group-III nitride crystal. The result also shows that the dislocation density in the group-III nitride crystal is reduced to not more than one-half the dislocation density obtained before the heat treatment.
US07687815B2
The invention provides a side-view LED having an LED window opened to a side to emit light sideward. A pair of lead frames each act as a terminal. An LED chip is attached to a portion of the lead frame and electrically connected thereto. A package body houses the lead frames and has a concave formed around the LED chip. Also, a high reflective metal layer is formed integrally on a wall of the concave. A transparent encapsulant is filled in the concave to encapsulate the LED chip, while forming the LED window. In addition, an insulating layer is formed on a predetermined area of the lead frames so that the lead frames are insulated from the high reflective metal layer. The side-view LED of the invention enhances light efficiency and heat release efficiency with an improved side-wall reflection structure.
US07687812B2
A representative LED array includes: a base substrate (BS) and a plurality of light emitting diodes, each of the light emitting diodes comprising a stack of a first contact layer, a semiconductor stack and a second contact layer, the semiconductor stack being on top of the first contact layer, the second contact layer being on top of the semiconductor stack; the plurality of light emitting diodes being arranged in pixel matrix on the base substrate as LEDs of at least three types (R, G, B); the LEDs according to their type (R, G, B) being arranged as at least a first, second and third sub-pixel in the pixel matrix for emission of radiation of a respective specific at least first, second and third color; and interconnection circuitry on the substrate, operative to connect to the light emitting diodes of the array for addressing each of the light emitting diodes.
US07687803B2
A semiconductor device includes a semiconductor chip and a wiring substrate. The wiring substrate is configured to be electrically connected to the semiconductor chip, and have a plurality of terminals arranged on an surface opposite to a surface on which the semiconductor chip is mounted. The plurality of terminals includes a plurality of first terminals configured to be arranged closely to each other, and a plurality of second terminals configured to be arranged so as to surround the plurality of first terminals. The plurality of second terminals is provided such that terminals of the semiconductor chip are connected to outer terminals through the plurality of second terminals. Each of the plurality of first terminals is not provided with a metal ball, while each of the plurality of second terminals is provided with a metal ball.
US07687801B2
It is to provide a thermodynamically and chemically stable dopant material which can achieve controls of the pn conduction types, carrier density, and threshold value of gate voltage, and a manufacturing method thereof. Further, it is to provide an actually operable semiconductor device such as a transistor with an excellent high-speed operability and high-integration characteristic. Provided is a dopant material obtained by depositing, on a carbon nanotube, a donor with a smaller ionization potential than an intrinsic work function of the carbon nanotube or an acceptor with a larger electron affinity than the intrinsic work function of the carbon nanotube. The ionization potential of the donor in vacuum is desired to be 6.4 eV or less, and the electron affinity of the acceptor in vacuum to be 2.3 eV or more.
US07687799B2
Methods and associated structures of forming a microelectronic device are described. Those methods may include forming a GaSb nucleation layer on a substrate, forming a Ga(Al)AsSb buffer layer on the GaSb nucleation layer, forming an In0.52Al0.48As bottom barrier layer on the Ga(Al)AsSb buffer layer, and forming a graded InxAl1-xAs layer on the In0.52Al0.48As bottom barrier layer thus enabling the fabrication of low defect, device grade InGaAs based quantum well structures.
US07687784B2
An implanter is equipped with an ion beam current detector, a temperature sensor, a temperature controller and a cooling system to increase the ratio of a specific ion cluster in the ion source chamber of the implanter. Therefore, the implanting efficiency for a shallow ion implantation is increased consequently.
US07687778B2
An infrared receiver includes a shielding member and an infrared detecting member. The shielding member has negative refractive power for diverging incident infrared rays. The infrared detecting member includes a main body formed with a convex surface having positive refractive power and an infrared sensor enclosed in the main body. The infrared sensor receives infrared rays converged by the convex surface, and converts received infrared rays to electrical signals.
US07687777B2
A cost-effective photosensor system for rotor position detection includes securing an aperture assembly to an off-the-shelf infrared radiation-emitting component and/or an off-the-shelf infrared radiation-detecting component. The application discloses an aperture assembly that may be stamped from a thin, opaque, elongated piece of plastic having an aperture window through which a radiation beam may pass and be focused. The aperture assembly also has a locking system for securing the assembly to the off-the-shelf photosensor system component, and an alignment system to direct the infrared radiation beam. A replaceable stamped aperture assembly for use in a rotor-sensing system and a method of providing a replaceable aperture assembly and securing it to an infrared component of a photosensor system are also disclosed.
US07687776B2
A gas imaging system for remotely detecting gas emissions by passive images of infrared radiation includes an optical system having a field of view. The optical system has a lens, an optical filter system for filtering light passed through the lens, and a photosensitive array located at the focal plane of the optical system to produce multi-spectral infrared image data of a scene under observation. A multi-spectral image processing system is configured for processing the image data produced by the photosensitive array to detect hazardous gas emissions and to discriminate against infrared radiation emitted by false alarm sources. Some embodiments may be configured for flame detection. Other embodiments may be configured for gas and flame detection.
US07687774B2
An infrared ray sensing element, includes: 1) a semiconductor substrate; 2) an infrared ray receiver disposed above the semiconductor substrate in such a manner as to be isolated from the semiconductor substrate, the infrared ray receiver being configured to receive an infrared ray; and 3) a beam configured to support the infrared ray receiver to the semiconductor substrate and include a thermopile configured to sense a temperature increase of the infrared ray receiver, wherein one of the following has a cross sectional shape that includes at least one protruding part: i) the beam, and ii) the thermopile.
US07687770B2
Some principles described herein contemplate implementation of downhole imaging for the characterization of formation fluid samples in situ, as well as during flow through production tubing, including subsea flow lines, for short term investigation, permanent, and/or long term installations. Various methods and apparatus described herein may facilitate downhole testing. For example, some embodiments facilitate multi-dimensional fluorescence spectrum measurement testing downhole.
US07687769B2
Some principles described herein contemplate implementation of downhole imaging for the characterization of formation fluid samples in situ, as well as during flow through production tubing, including subsea flow lines, for short term investigation, permanent, and/or long term installations. Various methods and apparatus described herein may facilitate downhole testing. For example, some embodiments facilitate multi-dimensional fluorescence spectrum measurement testing downhole and correlating the fluorescence with other oil properties.
US07687752B2
The present invention discloses a focus detection device capable of reading a plurality of focus detection outputs in parallel. As an exemplary structure, the focus detection device includes a focus detection sensor having a plurality of output terminals for outputting, in parallel, analog data corresponding to focus states of multiple points in the field of a viewfinder, a multiplexer for arranging and outputting, in series order on the one terminal, the analog data output in parallel from the plurality of output terminals of the focus detection sensor, and an A/D converter for converting, to digital data, the analog data arranged in series order on the one terminal through and output from the multiplexer.
US07687747B2
An electromagnet heating cable includes a center core, an inner layer body formed around the center core, an intermediate layer body formed around the inner layer body, an outer layer body formed around the intermediate layer body, an inner layer coil having a magnetic core disposed between the center core and inner layer body, an intermediate layer coil disposed between the inner layer body and the intermediate layer body, and an outer layer coil disposed between the intermediate layer body and outer layer body, wherein when a temperature of the heating cable exceeds a threshold, the intermediate layer body melts to electrically connect the intermediate layer coil to the outer layer coil.
US07687735B2
A packaging structure for depression switches includes an electronic substrate containing at least one switch electrode, a push-on switch located on the electronic substrate to connect the switch electrode to generate a command signal and a sealing member. The push-on switch and the electronic substrate form a first air chamber between them. The sealing member has a fastening portion to seal the push-on switch on the electronic substrate and a second air chamber formed with the electronic substrate to communicate with the first air chamber. By depressing the push-on switch to connect the switch electrode, air held in the first air chamber is squeezed and flows to the second air chamber without escaping.
US07687734B2
A dome switch structure that includes an actuator integrally formed with a dome is disclosed. Advantageously, the actuator can be formed so as to be positioned over and properly aligned with the dome. In one embodiment, the dome switch structure is used by an electronic device to provide user input. When the actuator is pressed by a user, the actuator depresses the dome and induces a switching action. In one embodiment, the dome switch structures can be manufactured (i.e., machined) as a unitary structure. Consequently, since actuators and domes can be formed together, the dome switch structures yield not only consistent accurate alignment but also simplified assembly of dome switches. Given the accurate alignment of an actuator to a corresponding dome, dome switches formed from the dome switch structures can have consistent and reliable tactile feel to users, which thereby provides reliable usage by users.
US07687732B1
A keyswitch apparatus features a key cap having a stem slidably moveable within a housing of a keyboard frame, to interact with an underlying membrane switch. According to one embodiment, the stem is square and at least two sets of channel-like guides on opposite sides of the stem are configured to be in sliding engagement with corresponding ribs projecting from the housing. Sliding engagement between the ribs and corresponding guides serves to minimize points of contact between the key cap and housing, reducing noise of operation. The rigid ribs and corresponding guides are relatively simple shapes that facilitate their fabrication with precise dimensional tolerances.
US07687730B2
A switch panel including a switch unit is mounted on a dashboard of an automotive vehicle. The switch unit has switches for operating devices mounted on the vehicle and ornamental members disposed between the switches. The ornamental member is composed of a base portion and a portion extending from the base portion. Front surfaces of the extending portion and the base portion are covered with an ornamental light-reflecting layer. The front surface of the extending portion is positioned flush with a touch surface of the switch. The front surface of the base portion is sloped so that light incident thereon is reflected toward a direction not in parallel to a gap formed between the extending portion and the switch. The light reflected on the sloped surface is invisible while the front surface of the extending portion is clearly visible, enhancing ornamental design effects of the switch unit.
US07687728B2
A safety switch includes a cable having a first end connected to a cable translator moveable between a disengaged position and an engaged position, the cable having a second end for connection to a remote lock and power supply switch.
US07687720B2
Described is an insulated non-halogenated, heavy metal free vehicular cable comprising an inner core of a copper based metal wire having a cross sectional area of at least about 0.1 mm2, and an outer insulation, covering the length of the inner core, comprised of a thermoplastic polyphenylene ether composition that has no halogen or heavy metal added thereto, the insulated cable capable of meeting the testing standard ISO 6722.
US07687715B2
An interconnection structure for circuit board and terminal members improves a configuration of a terminal member to be soldered to conductors on boards, and relaxes a stress applied to soldered portions, thereby preventing the soldered portions from a problem, such as cracking. An interconnection structure for circuit boards and terminal members includes two boards positioned away from each other. A terminal support base may be disposed on at least one of the boards and provided with a plurality of juxtaposed terminal guiding-holes, and a plurality of terminal members may be soldered to conductors on the two boards, may penetrate the terminal guiding-holes in the terminal support base, and may be provided with bent portions for stress relaxation at a position where the bent portions do not contact with the terminal support base.
US07687711B2
An entertainment device or other electronic device having an outward shape improved in functionality compared with that in the related art are provided. The electronic device includes a main housing that is formed in an approximately elliptical cylinder form, and disposed in a such a manner that a longitudinal direction is approximately horizontal to a setting surface, and has medium insertion ports for inserting a portable information storage medium such as an optical disk, and an approximately boxlike base portion attached to a lower portion of the main housing.
US07687710B2
Dead-end-to-dead-end overhead electrical power transmission line with at least two different conductors, and method of selecting and installing the conductors.
US07687709B2
This invention is a layered thin film semiconductor device comprising a first transparent layer; a thin, second transparent layer having a conductivity less than the first transparent layer; an n-type layer; and a p-type layer comprising one or more IIB and VIA elements. This invention is also a method for making such semiconductor device. The thin film semiconductor devices of this invention are useful for making photovoltaic devices.
US07687696B2
The present invention is a hollow body stringed musical instrument that utilizes a low mass, soundboard having a 12 to 25 foot radius dome configuration. The soundboard is made of a three ply torsion box design utilizing a honeycomb stiffening layer as the central core. Linear adjustable tuning braces are incorporated in the hollow body. The side and back of the instrument are also of a three ply construction having a polymer ir inorganic foam as the central layer. (Preferably this will be a closed cell foam.) The back also has a domed configuration with a 12 to 15 foot radius. All structural braces are eliminated from the interior of the instrument's body.
US07687686B2
The invention relates to the soybean variety designated D5124759. Provided by the invention are the seeds, plants and derivatives of the soybean variety D5124759. Also provided by the invention are tissue cultures of the soybean variety D5124759 and the plants regenerated therefrom. Still further provided by the invention are methods for producing soybean plants by crossing the soybean variety D5124759 with itself or another soybean variety and plants produced by such methods.
US07687683B2
Disclosed herein are a sweetpotato expansin cDNA (IbExpansin), a plant transformation vector carrying the same, and a transgenic plant comprising the vector. The transgenic Arabidopsis, prepared using the IbExpansin cDNA, outgrows the wild-type, thereby increasing in size and seed production up to three times. Thus, the gene is useful in the generation of highly productive transgenic plants for improvement in biomass and/or seed production.
US07687681B2
A personal care absorbent article such as a disposable diaper, sanitary pad or tampon, wound dressing or bandage which includes a nonwoven web material made from a plurality of polymeric fibers having at least one treatment chemistry suitable for modifying at least one characteristic of a high viscoelasticity fluid upon contact with the high viscoelasticity fluid. In accordance with one particularly preferred embodiment, the treatment chemistry is suitable for immobilizing the high viscoelasticity fluid within the nonwoven web material.
US07687679B2
An absorbent wearing article includes a liquid-absorbent structure and an excrement receiving structure having a plurality of passages defined by flexible walls formed from flexible sheets and disposed along a liquid-absorbent surface of the liquid-absorbent structure.
US07687675B2
This invention is directed to methods of converting oxygenates to olefin products. The methods provided include steps for protecting against deactivation of active molecular sieve catalysts during the conversion process. In particular, the invention provides for methods of regenerating coked catalyst to minimize catalyst deactivation due to contact with moisture.
US07687674B2
Recent experimental work with currently available adsorbents indicates that operating the adsorption section at lower temperatures improves the para-xylene productivity. As a result, an aromatics complex and heat recovery network for a low temperature adsorptive separation-isomerization loop is disclosed resulting in adsorbents savings in combination with higher capacity thereby enabling smaller adsorbents chambers, a smaller total heat exchanger area and a lower heat exchanger shell count.
US07687669B2
A method for alkyl oxygenate (e.g., methanol) manufacture via partial oxidation of alkane (methane) uses an injectively-mixed backmixing reaction chamber in fluid communication with a tubular-flow reactor. Alkyl free radicals are induced in the backmixing reaction chamber prior to being fed through a flow-restriction baffle to the tubular-flow reactor. Injective intermixing of feed streams agitates the backmixing reaction chamber. In one embodiment, a variable position flow restriction baffle is axially moved to commensurately modify the backmixing reaction chamber and tubular-flow reactor volumes. In another embodiment, the tubular-flow reactor is quenched with a variable position quenching input. The method further provides for condensing the output stream from the reaction system in a condensing scrubber and also for recycling a portion of the scrubbed output stream to the reactor system.
US07687665B2
The present invention relates to inhibitors of 11-β hydroxyl steroid dehydrogenase type 1, antagonists of the mineralocorticoid receptor (MR), and pharmaceutical compositions thereof. The compounds of the invention can be useful in the treatment of various diseases associated with expression or activity of 11-β hydroxyl steroid dehydrogenase type 1 and/or diseases associated with aldosterone excess.
US07687660B2
The present invention relates to intermediates of rosuvastatin and processes for the production thereof.
US07687657B2
The invention relates to a process for the preparation of (bis)acylphosphanes of formula I, wherein n and m are each independently of the other 1 or 2; R1 if n=1, is e.g. unsubstituted or substituted C1-C18alkyl or C2-C18alkenyl, or phenyl, R1 if n=2, is e.g. a divalent radical of the monovalent radical defined above; R2 is e.g. C1-C18alkyl, C3-C12cycloalkyl, C2-C18alkenyl, mesityl, phenyl, naphthyl; R3 is one of the radicals defined under R1; the process comprises the steps a) contacting e.g. elemental phosphorous [P]∞, P(Hal)3 with a reducing metal optionally in the presence of a catalyst or an activator in a solvent to obtain metal phosphides Me3P or Me′3P2, wherein Me is an alkali metal and Me′ is an earth alkali metal or to obtain metal polyphosphides b) optionally adding a proton source, optionally in the presence of a catalyst or an activator to obtain metal dihydrogen phosphides MePH2; c) subsequent acylation reaction with m acid halides of formula III or m carboxylic acid esters of formula IV or, in case that in formula I m=1, with one carboxylic ester of formula IV followed by one acid halide of formula III or vice versa, wherein R is the residue of an alcohol and R2 is as defined above; d) alkylation reaction subsequent reaction with an electrophilic agent R1Hal or other electrophilic agents to obtain the compounds of formula I. An oxidation step may follow to obtain mono- and bisacylphosphane oxides or mono- and bisacylphosphane sulfides, which are used as photoinitiators.
US07687655B2
The present invention relates to a process for the manufacture of dinitrile compounds by double hydrocyanation of an olefin.It relates particularly to a process for the manufacture of dinitrile compounds by double hydrocyanation of an olefin present in a mixture of hydrocarbons, such as a petroleum fraction and more particularly still a petroleum fraction known under the name of C4 fraction.The process of the invention comprises a sequence of stages for the separation of the various compounds which makes it possible to remove the byproducts, such as the products from the trimerization of alkynes, present in the C4 fraction and thus to prevent their accumulation in the hydrocyanation reactors.
US07687651B2
The invention relates to a method for the preparation of trans- or cis-diammoniumdichlorodihydroxoplatinum(IV) and derivatives thereof. What is suggested is reacting trans- or cis-diammoniumdichloroplatinum(II) with a solution comprising >30% peroxide at temperatures below 30° C. and dissolving the product thus obtained in a mineral acid and subsequently precipitating with an alkaline solution.
US07687640B2
The present invention relates to a process for preparing a compound of formula (6a): wherein Ar1 represents an imidazolyl group which may be substituted with 1 to 3 substituents shown below; Ar2 represents a pyridinyl group, a pyrimidinyl group or a phenyl group which may be substituted with 1 to 3 substituents; and R11 represents a group selected from certain substituents.
US07687634B2
N-Substituted (6-haloalkylpyridin-3-yl)alkyl sulfoximines are effective at controlling insects.
US07687632B2
Process for the preparation of substituted pyridine derivatives of formula (I) comprising reaction of a α-β-unsaturated carbonyl compound of formula (II) R3—C(O)—C(R1)═C(R2)-G with a Wittig reagent or Horner-Wadsworth-Emmons reagent in the presence of a base and optionally subsequent cyclization.
US07687630B2
The invention provides a method for producing optically active 3-quinuclidinols having one or more substituted groups at the 2-position; wherein 3-quinuclidinones having one or more substituted groups at the 2-position are reacted with compounds providing hydrogen in the presence of a certain metal complex.
US07687613B2
The invention provides a gene transfer vector comprising a humanized nucleic acid sequence encoding an immunogenic portion of one or more exotoxins of Bacillus anthracis and a heterologous sorting signal. The invention also provides a method of producing an immune response against Bacillus anthracis in a host comprising administering to the host the gene transfer vector.
US07687612B1
The present invention relates to a novel reactive dyestuff with dialkylether bridge group, represented by the following formula (I): wherein B, B′, E1, E2, Z, Z′, i, j, (R1)0-3, (R2)0-3, m and n are defined the same as the specification. The reactive dyestuff of the present invention is suitable for exhaust dyeing, cold batch-up dyeing, continuous dyeing, printing and digital spray printing materials that contain hydroxyl group or amino group fibers.
US07687595B2
A sulfonated telechelic polycarbonate is described which is produced by melt synthesis. A dihydroxy compound is reacted with a sulfobenzoic acid salt, then with an activated carbonate. The method results in a sulfonated telechelic polycarbonate which has a high percentage of sulfonated end groups, is soluble, and is transparent.
US07687578B2
Sealant and potting formulations are provided which are prepared from components including ungelled mercapto-terminated polymer(s) prepared by reacting reactants comprising polyvinyl ether monomer(s) and polythiol material(s); curing agent(s) reactive with a mercapto group of the mercapto-terminated polymer; and additive(s) selected from the group consisting of fillers, adhesion promoters, plasticizers and catalysts.
US07687561B1
The present invention relates to toughened cyanoacrylate compositions.
US07687550B2
One embodiment of a composition includes a radiation-curable pre-polymer and at least one stabilizing additive contained in the radiation-curable pre-polymer. The stabilizing additive is configured to reduce shrinkage caused by radiation curing of the radiation-curable pre-polymer.
US07687544B2
A method of treating and preventing type 2 diabetes and obesity an animal, including mammals and humans, in which a therapeutically effective amount of catalpic acid to the animal is administered orally or parentally.
US07687539B1
The topical use of 5,6,7-trihydroxyheptanoic acid and analogs alone or in combination with histamine antagonists and/or mast cell stabilizers is disclosed for the treatment of ocular allergy.
US07687535B2
The present invention relates to substituted indoles useful as pharmaceutical compounds for treating respiratory disorders.
US07687532B2
Compounds of formula (I): are inhibitors of p38 kinase and are useful in the treatment of conditions or disease states mediated by p38 kinase activity or mediated by cytokines produced by the activity of p38.
US07687520B2
Selective dual serotonin and norepinephrine reuptake inhibitors are provided. These compounds have a lower side-effect profile and are useful in compositions and products for use in treatment of a variety of conditions including depression, fibromyalgia, anxiety, panic disorder, agorophobia, post traumatic stress disorder, premenstrual dysphoric disorder, attention deficit disorder, obsessive compulsive disorder, social anxiety disorder, generalized anxiety disorder, autism, schizophrenia, obesity, anorexia nervosa, bulimia nervosa, Gilles de la Tourette Syndrome, vasomotor flushing, cocaine and alcohol addiction, sexual dysfunction, borderline personality disorder, fibromyalgia syndrome, diabetic neuropathic pain, chronic fatigue syndrome, pain, Shy Drager syndrome, Raynaud's syndrome, Parkinson's Disease, and epilepsy.
US07687519B2
The invention provides compounds of formula I: wherein a, b, c, m, n, q, r, W, Z1, Ar1, Z2, Y, R1, R2, and R3 are as defined in the specification. The compounds of formula I are muscarinic receptor antagonists. The invention also provides pharmaceutical compositions containing such compounds, processes and intermediates for preparing such compounds and methods of using such compounds to treat pulmonary disorders.
US07687518B2
4-Tetrazolyl-4-phenylpiperidine Compounds, compositions comprising an effective amount of a 4-Tetrazolyl-4-phenylpiperidine Compound, methods for treating or preventing pain or diarrhea in an animal comprising administering to an animal in need thereof an effective amount of a 4-Tetrazolyl-4-phenylpiperidine Compound and methods for stimulating opioid-receptor function in a cell comprising contacting a cell capable of expressing an opioid receptor with an effective amount of a 4-Tetrazolyl-4-phenylpiperidine Compound are disclosed.
US07687513B1
Disclosed herein are aminopyridinium cations and compositions containing these cations. Piperidino pyridinium cations and compositions containing these cations are also described. Ionic compositions, particularly liquid ionic compositions that contain the aminopyridinium cation or piperidino pyridinium cation are also described. Methods of enhancing the thermal stability of a compound, particularly an ionic compound, using the aminopyridinium or piperidino pyridinium cations, are also presented. Compositions having an expanded liquidus range of from about −73° C. to about 444° C. are also described. Solvents, heat transfer fluids, and lubricants having improved thermal stability characteristics and an expanded and improved liquidus range are also disclosed.
US07687506B2
Inhibition of protein kinases having one or more cysteine residues within the ATP binding site is effected by contacting the kinase, per se or in a cell or subject, with an inhibitory-effective amount of a compound having a heterocyclic core structure comprised of two or more fused rings containing at least one nitrogen ring atom, and an electrophilic substituent that is capable of reacting with a cysteine residue within the ATP binding site of a kinase. Preferred compounds include certain pyrrolopyrimidines and oxindoles having such an electrophilic substituent and optionally an aromatic or heteroaromatic substituent that is capable of interacting with a threonine or smaller residue located in the gatekeeper position of the kinase. Kinases lacking such cysteine residues may be engineered or modified so that they are capable of being inhibited by such compounds by replacing a valine or other amino acid residue within the ATP binding site by a cysteine residue.
US07687501B2
In its many embodiments, the present invention provides tricyclic compounds of formula I (wherein J1-J3, X, Z, and R1, R3, and R4 are as defined herein) useful as metabotropic glutamate receptor (mGluR) antagonists, particularly as selective metabotropic glutamate receptor 1 antagonists, pharmaceutical compositions containing the compounds, and methods of treatment using the compounds and compositions to treat diseases associated with metabotropic glutamate receptor (e.g., mGluR1) such as, for example, pain, migraine, anxiety, urinary incontinence and neurodegenerative diseases such Alzheimer's disease.
US07687499B2
Certain cyclopropyl amines are histamine H3 modulators useful in the treatment of histamine H3 receptor mediated diseases.
US07687497B2
The novel C10-modified camptothecin analogs, and pharmaceutically-acceptable salts thereof, of the present invention: (i) possess potent antitumor activity (i.e., in nanomolar or subnanomolar concentrations) for inhibiting the growth of human and animal tumor cells in vitro; (ii) are potent inhibition of Topoisomerase I; (iii) lack of susceptibility to MDR/MRP drug resistance; (iv) require no metabolic drug activation: (v) lack glucuronidation of the A-ring or B-ring; (vi) reduce drug-binding affinity to plasma proteins; (vii) maintain lactone stability; (viii) maintain drug potency; and (ix) possess a low molecular weight (e.g., MW<600).
US07687495B2
Substituted piperidines of formulae (I) and (II) with the substituent definitions as explained in the specification. The compounds are suitable in particular as renin inhibitors and are highly potent.
US07687493B2
The present invention relates to a novel method for the preparation of azetidine derivatives such as N-{1-[bis(4-chlorophenyl)methyl]azetidin-3-yl}-N-quinol-6-ylmethylsulfonamide and the dihydrochloride thereof and N-{1-[bis(4-chlorophenyl)methyl]azetidin-3-yl}-N-(3,5-difluorophenyl)methylsulfonamide.
US07687489B2
A pharmaceutical composition for the treatment and/or prevention of cerebral ischemic diseases, which comprises two components, i.e. an astrocyte function-improving agent, preferably a compound represented by the formula (I): (wherein R6 is hydroxy, etc., (1) n is 1, R11 is hydrogen and R5 is (alkyl of which one carbon atom is substituted by fluorine)-CH2— or (2) n is 0 or 1, R11 is hydrogen, etc., and R5 is alkyl, etc.) and a thrombolytic agent, preferably tissue plasminogen activator, as active ingredients. The pharmaceutical composition of the present invention exhibits a synergistic therapeutic effect compared to independent administration of an astrocyte function-improving agent and a thrombolytic agent.
US07687483B2
Novel phospho-derivatives of branched-chain lipophilic molecules useful for permeabilizing biological barriers and for inhibiting tumor growth are disclosed. Pharmaceutical compositions comprising phospho-derivatives of branched-chain lipophilic molecules and their uses are also disclosed.
US07687481B2
The present invention provides novel pyrazoles that are useful as cannabinoid receptor antagonists and pharmaceutical compositions thereof and methods of using the same for treating obesity, diabetes, and/or cardiometabolic disorders.
US07687476B2
The present invention relates to the use of one or more of the compounds of the group consisting of 4-thiouridine, isomaltitol, and uridine in the preparation of therapeutically effective compositions against acute or chronic inflammations, and/or problems in hemostasis related to platelet function, as well as a method for treatment of acute or chronic inflammations, and/or problems in hemostasis related to platelet function with the exception of the use of uridine in the treatment of inflammatory conditions caused by a bacterial infection.
US07687473B2
The present invention provides a method for increasing the efficacy of antifolates which act via inhibition of dihydrofolate reductase (DHFR). The method comprises the steps of administration of 5-amino-4-imidazolecarboxamide riboside (Z) or its base with the antifolate such that the targeted cells are exposed to both the antifolate and Z simultaneously. This results in increased influx of the antifolate. For MTX, accumulation of the more biologically active polyglutamate forms is also potentiated. This potentiation appears to be mediated by an effect on the RFC.
US07687471B2
The present invention provides a stable veterinary oral composition which comprises one or more surfactants, a water-miscible solvent, optionally an oil and an effective amount of each of a benzimidazole antihelmintic compound, such as triclabendazole and a macrocyclic lactone, such as moxidectin. Said composition is useful for treating and controlling endo- and ectoparasitic infection and infestation in a homeothermic animal.
US07687461B2
The invention relates to novel proteins with TNF-alpha antagonist activity and nucleic acids encoding these proteins. The invention further relates to the use of the novel proteins in the treatment of TNF-alpha related disorders.
US07687453B2
A mixed micellar pharmaceutical formulation includes a micellar pharmaceutical agent, an alkali metal C8 to C22 alkyl sulfate, alkali metal salicylate, a pharmaceutically acceptable edetate and at least one absorption enhancing compounds. The absorption enhancing compounds are selected from the group consisting of lecithin, hyaluronic acid, pharmaceutically acceptable salts of hyaluronic acid, octylphenoxypolyethoxyethanol, glycolic acid, lactic acid, chamomile extract, cucumber extract, oleic acid, linolenic acid, borage oil, evening primrose oil, trihydroxy oxo cholanylglycine, glycerine, polyglycerin, lysine, polylysine, triolein and mixtures thereof. Each absorption enhancing compound is present in a concentration of from 1 to 10 wt./wt. % of the total formulation, and the total concentration of absorption enhancing compounds are is less than 50 wt./wt. % of the formulation.
US07687450B2
The present disclosure relates to compositions useful for maintaining the clean impression of a carpet (that is, its scent and appearance) over an extended time despite occurrences that might damage the carpet surface. The composition, which includes an antimicrobial agent, an enzyme inhibitor, and an odor-reacting compound, can be used by a consumer to remove contaminants from the carpet and to prevent the odor associated with the decomposition of future contamination. Specifically, the composition has been shown effective in neutralizing odors associated with the decomposition of organic materials (such as urine or food spills) by absorbing and/or removing the odor-generating source. A manufacturing treatment composition and methods for using are also disclosed.
US07687447B2
The present invention relates to semi-aqueous compositions and the method using same, to remove highly cross-linked resists and etch-residues. The compositions are comprised of aminobenzenesulfonic acid, water miscible organic solvent and water.
US07687444B2
A lubricating oil composition having a TBN in the range of 5 to 55 mg KOH/g and containing a major amount of a base oil of lubricating viscosity and a) 0.19 to 2.10 wt %, based on the total amount of the lubricating oil composition, of an overbased calcium carboxylate having a TBN of 100 mg KOH/g or more, wherein the wt % is expressed in terms of the calcium content; b) 0.002 to 0.06 wt %, based on the total amount of the lubricating oil composition, of a bis-succinimide compound, wherein the wt % is expressed in terms of the nitrogen content; and c) 0.007 to 0.15 wt %, based on the total amount of the lubricating oil composition, of a zinc dialkyldithiophosphate having a secondary alkyl group, wherein the wt % is expressed in terms of the phosphorus content.
US07687433B2
A method of fabricating a product of activated carbon fiber supporting silver has the steps of: a) Impregnate activated carbon fibers in a silver acetate solution under a vacuum condition for a predetermined time to deposit silver on surfaces of the activated carbon fibers via a chemical reaction. And then, dry the activated carbon fibers to remove water therein. b) Heat the activated carbon fibers in a stove filled with protective gas to break the silver on the activated carbon fibers into very fine grains, and c) wash the activated carbon fibers to remove redundant sliver from the surfaces of the activated carbon fibers.
US07687431B2
A nanotube-shaped titania having an aspect ratio of 6 or greater can be produced by anodizing a titanium metal or an alloy containing mainly titanium in an electrolyte solution containing a halogen atom-containing ion, such as a perchloric acid aqueous solution.
US07687426B2
A catalyst composition for the polymerization of propylene comprising one or more Ziegler-Natta procatalyst compositions comprising one or more transition metal compounds and one or more monoesters of aromatic carboxylic acid internal electron donors; one or more aluminum containing cocatalyst; and a mixture of two or more different selectivity control agents, said SCA mixture comprising from 70 to 98 mol percent of one or more esters of one or more aromatic monocarboxylic acids or substituted derivatives thereof, and from 30 to 2 mol percent of one or more alkoxysilane compounds containing one or more 5- or 6-membered cyclic groups optionally containing one or more Group 14, 15 or 16 heteroatoms.
US07687420B2
The invention relates to a tempered glass comprising, in terms of mass percent, SiO2: 60 to 80%; Al2O3: 3 to 18%; B2O3: 0 to 7%; Li2O: 0.01 to 10%; Na2O: 4 to 16%; K2O: 0 to 15%; and R′O (wherein R′O indicates a total content of alkaline earth metal oxides): 0 to 5%, wherein a value of (Li2O+Al2O3)/(Na2O+K2O) in terms of molar ratio is within a range of 0.1 to 2, and wherein a surface of the tempered glass is treated to form a compressive stress layer.
US07687418B2
The X-ray opaque glass is characterized by a composition, in mol %, of SiO2, 75-98; Yb2O3, 0.1 to 40; and ZrO2, 0 to 40. Preferred embodiments of the glass are free of Al2O3 and B2O3. The glass is produced from the glass batch by melting at a temperature of at least 1500° C. in an iridium or iridium alloy vessel with the assistance of high-frequency radiation. In preferred embodiments of the glass production process at least one raw material ingredient is present in the batch as a nanoscale powder. The glass is useful in dental applications, optical applications, and biomedical applications, or for photovoltaics, or as a target material in PVD processes.
US07687398B2
Nickel silicide is formed on the basis of a gaseous precursor, such as nickel tetra carbonyl, wherein the equilibrium of the decomposition of this gas may be controlled to obtain a highly selective nickel silicide formation rate. Moreover, any etch step for removing excess nickel may be avoided, since only minute amounts of nickel may form on exposed surfaces, which may then be effectively removed by correspondingly shifting the equilibrium. Consequently, reduced process complexity, enhanced controllability and enhanced tool lifetime may be obtained.
US07687393B2
A polishing composition for reducing the haze level of the surface of silicon wafers contains hydroxyethyl cellulose, polyethylene oxide, an alkaline compound, water, and silicon dioxide.
US07687389B2
A method for fabricating a semiconductor device includes forming a gate insulation layer over a substrate, forming a first gate conductive layer over the gate insulation layer, forming a barrier metal over the first gate conductive layer, sequentially forming a second gate conductive layer and a gate hard mask over the barrier metal, patterning the gate hard mask, the second gate conductive layer, the barrier metal, the first gate conductive layer, and the gate insulation layer to form a gate pattern, and performing a plasma selective gate re-oxidation process on the gate pattern.
US07687387B2
A method of manufacturing a semiconductor device according to an embodiment of the present invention includes depositing first to third mask layers above a substrate, processing the third mask layer, processing the second mask layer, slimming the second mask layer in an L/S section and out of the L/S section, peeling the third mask layer in the L/S section and out of the L/S section, forming spacers on sidewalls of the second mask layer in the L/S section and out of the L/S section, etching the second mask layer in the L/S section, under a condition that the second mask layer out of the L/S section is covered with a resist, to remove the second mask layer in the L/S section while the second mask layer out of the L/S section remains, and processing the first mask layer by etching, using the spacers in the L/S section and out of the L/S section and the second mask layer out of the L/S section as a mask, the spacers in the L/S section and out of the L/S section and the second mask layer out of the L/S section being thinned by the etching.
US07687384B2
Provided is a method for fabricating a semiconductor device. In the method, a poly layer on a semiconductor substrate is etched to a predetermined depth. Ions are implanted into the poly layer at a predetermined angle. The poly layer is etched again to expose a portion of the semiconductor substrate. Therefore, stress is applied to the poly gate instead of the barrier layer, so that the barrier layer is not opened during contact etching because effects of the barrier layer thickness can be solved. Also, stress is applied to a poly gate directly contacting a channel region of the semiconductor substrate to allow tensile force caused by the stress of the poly gate to directly induce tensile force to the channel region, and thus increase mobility, so that device characteristics can be remarkably enhanced.
US07687383B2
Methods of making Si-containing films that contain relatively high levels of Group III or Group V dopants involve chemical vapor deposition using trisilane and a dopant precursor. Extremely high levels of substitutional incorporation may be obtained, including crystalline silicon films that contain at least about 3×1020 atoms cm−3 of an electrically active dopant. Substitutionally doped Si-containing films may be selectively deposited onto the crystalline surfaces of mixed substrates by introducing an etchant gas during deposition.
US07687379B2
Disclosed is a method of manufacturing a semiconductor device whereby InAs(1-x)Sbx semiconductor layer is formed on an easily available and economical semiconductor substrate such as a GaAs substrate or a Si substrate. According to the method, a quantum dot layer is formed between a semiconductor substrate and a semiconductor layer to reduce defects caused by lattice mismatch between the semiconductor layer and the semiconductor layer. The method may improve the growth speed of the semiconductor layer. In addition, because the InSb layer provided by the present invention has an electron mobility greater at room temperature, it may improve the quality and productivity of the semiconductor device.
US07687378B2
A fabricating method of nitride semiconductor substrate is provided. First, a first substrate including a first base material, a nitride semiconductor template layer stacked on the first base material, and a first dielectric layer stacked on the nitride semiconductor template layer is provided. Then, the first dielectric layer and the nitride semiconductor template layer are patterned, and a second substrate including a second base material and a second dielectric layer stacked on the second base material is provided. Next, the nitride semiconductor template layer and the first dielectric layer of the first substrate are transferred onto the second dielectric layer of the second substrate through bonding and transferring processes, and then a nitride semiconductor thick film is grown from the nitride semiconductor template layer through an epitaxy process. After that, the nitride semiconductor thick film and the second substrate are separated.
US07687377B2
In a method of fabricating a phase change memory (PCM) device, a substrate having bottom electrodes formed therein is provided. A first dielectric layer having cup-shaped thermal electrodes is formed over the substrate. Second dielectric layers are formed on the substrate. Stacked structures are formed on the substrate. A PC material film is formed over the substrate and covers the stacked structures and the second dielectric layers. The PC material film is anisotropically etched to form PC material spacers on sidewalls of the stacked structures, and each of the PC material spacers physically and electrically contacts each of the cup-shaped thermal electrodes and top electrodes. The PC material spacers include phase change material. The PC material spacers are over-etched to remove the PC material film on the sidewalls of the second dielectric layers.
US07687370B2
A method for forming a semiconductor isolation trench includes forming a pad oxide layer over a substrate and forming a barrier layer over the substrate. A masking layer is formed over the barrier layer and is patterned to form at least one opening in the masking layer. At least a part of the barrier layer and at least a part of the pad oxide layer are etched through the at least one opening resulting in a trench pad oxide layer. Etching of the trench pad oxide layer stops substantially at a top surface of the substrate within the isolation trench. An oxide layer is grown by diffusion on at least the top surface of the substrate corresponding to the at least one isolation trench. The method further includes etching the oxide layer and at least a portion of the substrate to form at least one isolation trench opening.
US07687368B2
A semiconductor device manufacturing method is disclosed. The method is to form a second semiconductor layer which has less susceptibility to adopting insulative characteristics than a first semiconductor layer on the first semiconductor layer. Then, grooves which expose portions of the second and first semiconductor layers are formed to extend from the upper surface of the second semiconductor layer into the first semiconductor layer. Next, portions of the first and second semiconductor layers which are exposed to the grooves are changed into an insulator form to fill the grooves with the insulator-form portions of the first semiconductor layer.
US07687363B2
Disclosed is a method of manufacturing a semiconductor device, which includes the steps of: forming a high-voltage well region (e.g., by implanting impurity ions into a semiconductor substrate and then annealing); forming an isolation layer on the semiconductor substrate; implanting impurity ions into the high-voltage well region, thereby forming a low-voltage well region within the high-voltage well region; forming a gate electrode on the semiconductor substrate; and implanting impurity ions using the gate electrode as a mask, thereby forming source/drain regions within the low-voltage well region.
US07687361B2
Disclosed is a method for fabricating a transistor of a memory device capable of preventing voids from being created when forming a low-resistant gate electrode. The method includes the steps of forming an active area by etching a semiconductor substrate, forming a field oxide layer in the semiconductor substrate and forming a recess by etching the field oxide layer. A gate insulation layer is formed along an upper surface of the active area and an exposed portion of the active area. A gate electrode is formed on the field oxide layer such that the gate electrode extends across an upper portion of the active area while being overlapped with a channel area and the recess. The first conductive layer to be patterned has the same thickness, so the low-resistant gate electrode is easily fabricated without forming the voids.
US07687350B2
A method for manufacturing a semiconductor memory device using asymmetric junction ion implantation, including performing ion implantation for adjusting a threshold voltage to a semiconductor substrate, forming a gate stack on the semiconductor substrate to define a storage node junction region and a bit line junction region, implanting a first conductive impurity ion and a second conductive impurity ion using a mask layer pattern covering the storage node junction region while exposing the bit line junction region, forming a gate spacer layer at both sides of the gate stack, and implanting the first conductive impurity ion using the gate stack and the gate spacer layer as an ion implantation mask layer to form a storage node junction region and a bit line junction region having different impurity concentrations, and different junction depths from each other.
US07687348B2
A semiconductor device includes a semiconductor substrate having an insulation layer and a semiconductor layer formed on the insulation layer; a channel area formed in the semiconductor layer; a gate electrode formed on the channel area; a source area formed in the semiconductor layer and having a depth not reaching the insulation layer; a drain area formed in the semiconductor layer adjacent to the source area with the channel area in between and having a depth reaching the insulation layer; a separation area disposed next to the source area opposite to the channel area and having a depth not reaching the insulation layer; a high-concentration body area formed in the semiconductor layer at lease in a surface layer thereof and between the first separation area and the second separation area; and a body contact disposed on the high-concentration body area.