US10084393B2
A method of putting a converter module of a cascade converter system into operation, wherein the cascade converter system includes: n converter modules; n bypass switch modules; and a system controller, wherein the method includes: a module pre-plug-in step: m bypass switch modules of the n bypass switch modules being in a non-bypass state, and remaining n-m bypass switch modules being in a bypass state, the system controller communicating with the module controllers of the m converter modules, such that the m converter modules operate according to a first control signal, wherein 1≤m
US10084391B2
An inverter, a method and a device for controlling the inverter are provided, to improve efficiency of the inverter. The inverter includes a three-level active clamped topology including a first and second bus capacitors and an inverter circuit, the inverter circuit includes a first switch transistor to a sixth switch transistor. The inverter further includes a seventh switch transistor and an eighth switch transistor; the seventh switch transistor and the eighth switch transistor are connected in series between the positive direct current bus and the negative direct current bus in a same direction, and a serial point of the seventh switch transistor and the eighth switch transistor is connected to a serial point of the second switch transistor and the third switch transistor; and the seventh switch transistor and the eighth switch transistor are anti-parallel connected to corresponding diodes respectively.
US10084376B2
A circuit such as a subscriber line interface circuit (SLIC) has a multiple output power converter including an inductive converter, a first passive rectifier, a first capacitor, and a second passive rectifier. The inductive converter has a voltage input terminal for receiving an input voltage, and a voltage output terminal. The first passive rectifier has an input coupled to the voltage output terminal of the inductive power converter, and an output for providing a first power supply voltage. The first capacitor has a first terminal coupled to the output terminal of the inductive converter, and a second terminal. The second passive rectifier has an input coupled to the second terminal of the first capacitor, and an output terminal for providing a second power supply voltage different from the first power supply voltage.
US10084373B2
According to one embodiment, a power conversion device includes a first switch serially connected to a second switch, a first diode serially connected to a second diode, the first switch and the first diode connected to the second switch and the second diode, an AC power supply and an inductor serially connected to a connection point between the first switch and the second switch and a connection point between the first diode and the second diode, a capacitor serially connected to ends of the first diode and the second diode connected, and a potential difference between the ends of the capacitor is used as an output voltage. The control unit supplies a pulse signal to the first switch and the second switch to provide a sinusoidal current through the AC power supply, based on a detected power supply voltage, a detected circuit current, and a detected capacitor voltage.
US10084367B2
A vibration motor is disclosed. The vibration motor includes a housing having a bottom wall and a sidewall extending from the bottom wall; a cover engaging with the housing for forming a receiving space; a first vibration system suspended by a first elastic member in the receiving space; a second vibration system suspended by a second elastic member in the receiving space; a first restricting hole penetrating the first vibration system; a second restricting hole penetrating the second vibration system; a channel formed cooperatively by the first restricting hole and the second restricting hole; a restricting block having one end fixed to the cover, another end fixed to the bottom wall, and a middle portion at least partially received in the channel.
US10084360B2
The present application discloses an electric working machine. The electric working machine includes: a motor including a rotor; a sensor board including a magnetic sensor for detecting magnetic variation due to rotation of the rotor; and a housing which contains the motor and the sensor board. in the electric working machine, the sensor board does not cover an entire circumference of the rotor. In the electric working machine, the sensor board has a portion covering the rotor, and a portion not covering the rotor.
US10084356B2
A motor includes a housing, a stator and a rotor. The stator is received in the housing. The rotor includes a shaft and a permanent magnet. The shaft is rotatably coupled to the housing, and one end of the shaft extends out of the housing through a shaft hole. A gap is formed between the shaft and the shaft hole. The permanent magnet is coupled with the shaft and spaced from the stator. A sealing member is arranged on the housing and surrounds the shaft hole. The sealing member includes a blocking portion abutting with a predetermined part of the rotor outside the housing. The blocking portion seals the gap. As such, dustproof and damp-proof functions of the motor are improved.
US10084355B2
An electrical machine is disclosed comprising a stator cavity. The stator cavity is axially divided by a distribution plate into a winding chamber containing stator windings of the electrical machine and a handling chamber. The handling chamber has one of a fluid inlet and a fluid outlet and the winding chamber has the other of the fluid inlet and fluid outlet. In use fluid is passed from the fluid inlet to the fluid outlet via the handling chamber, the winding chamber and an array of fluid passages in the distribution plate providing fluid communication between the handling chamber and winding chamber. The array of fluid passages comprises passages of at least two different cross-sectional areas.
US10084354B2
An interior permanent magnet motor capable of increasing an output of a motor without reducing torque by increasing demagnetization resistance. The interior permanent magnet motor includes a rotator including a rotator core, and a stator. The rotator core includes a plurality of magnet accommodating holes and a plurality of permanent magnets. The thickness in the short-side direction of each of the magnet accommodating holes is minimum at the center portion of the magnetic pole, and is gradually increased toward the radially outer side of the rotator core. At least the thickness in the short-side direction of the permanent magnet at the center portion of the magnetic pole is equal to the thickness in the short-side direction of the magnet accommodating hole at the center portion of the magnetic pole.
US10084352B2
A thin axial gap motor includes: a base, a circuit unit installed on the base; a stator module including at least one flat permeable frame and at least one winding, and the permeable frame having at least one support arm and an induced magnetic part connected to the at least one support arm, and the winding being wound around the support arm; a rotor module including a flat permanent magnet installed at the top of the induced magnetic parts and having an orthographic projection range corresponsive to the area of the induced magnetic part, and the at least one winding being disposed on an outer side of the permanent magnet; and a pivoting element installed between the base and the rotor module and including a bearing housing and a spindle plugged into the bearing housing for rotating the rotor module with respect to the base.
US10084343B2
Systems and methods to for wireless power transfer are provided. A transmit control module generates a sequence of resonant drive frequencies for a transmit coil. The transmit control module adjusts the resonant frequency of the transmit coil according to the sequence of resonant drive frequencies. A receive control module provides payment verification to the transmit control module and receives the sequence of resonant drive frequencies from the transmit control module in return. The receive control module adjusts a resonant frequency of a receive coil according to the sequence of resonant drive frequencies to match the resonant frequency of the transmit coil. The resonant frequencies of the transmit and receive coils change at the same time to maintain coupling and efficient power transfer.
US10084322B2
The present disclosure relates to a tuning circuit, a tuning method and a resonance-type contactless power supply. The resonance-type contactless power supply has the characteristic that an inductor current has a maximum value when it operates at a resonance frequency. Sampling values of the inductor current in two successive cycles are compared with each other. A frequency of an inverter circuit is adjusted in a manner the same as that in a previous cycle in a case that the inductor current increases, and is adjusted in a manner opposite to that in the previous cycle in a case that the inductor current decreases. Thus, the resonance-type contactless power supply can be properly tuned without the need for zero-crossing detection.
US10084308B1
An overcurrent protection device includes a polymer positive temperature coefficient (PPTC) component and two pins. The PPTC component includes a positive temperature coefficient (PTC) element having two opposite surfaces, and two electrodes respectively connected to the surfaces of the PTC polymeric element. The two pins are respectively connected to the electrodes and extend in an extending direction. Each of the pins has a cross-sectional area that is perpendicular to the extending direction and greater than or equal to 0.8 mm2. The overcurrent protection device has an average trip current and an average work current, where the ratio of the average trip current to the average work current is less than 1.5.
US10084307B2
The disclosure provides an over-current protection circuit. A signal generating block in the over-current protection circuit generates one or more input voltages, a summed voltage and an average voltage in response to one or more differential voltages. A control block generates one or more control signals in response to the one or more input voltages and the average voltage. An analog control loop block generates an initiation signal in response to the summed voltage and an output voltage. A phase control logic block generates one or more PWM (pulse width modulated) signals in response to the initiation signal and the one or more control signals.
US10084299B1
A socket cover for covering a seat of a socket includes a body covering on the seat; the body having two recesses and two openings; the openings are positioned corresponding to the two electrical connecting portions so as to expose the two electrical connecting portions; two protecting sheets on the body; the each protecting sheet being movable along a first moving path and between an open position and a close position; a direction of the first moving path being parallel to axes of the two protecting sheets; and wherein when the protecting sheet is positioned in the recess, it is at the open position; and when the protecting sheet moves to the close position, it will cover a respective one of the two electrical connecting portions. The recesses and the protecting sheets are arranged on an outer side of the body or an inner side of the body.
US10084292B2
An object of the present invention is to provide a polarized vinylidene fluoride/tetrafluoroethylene copolymer resin film that can significantly reduce, when used as an optical film, the deterioration of the quality of video or still images formed by display elements.The present invention provides a polarized vinylidene fluoride/tetrafluoroethylene copolymer resin film having 2,000 or fewer spot defects per m2, the number of spot defects being measured by a defect measurement method; the method using an surface inspection system in which a CCD camera is placed so as to detect defects at an angle of 45 degrees relative to an LED source, defects of the film are read within a rectangular range of 300 mm in a width direction (the direction perpendicular to the scanning direction), and 150 mm in a machine direction (the scanning direction), while the film is scanned under the camera at a rate of 20 m/min; wherein first, defects having a bright area of 1.5 mm2 or less and a dark area of 1.4 mm2 or less are selected; and next, in order to remove defects resulting from causes other than a corona treatment contained in these defects, a circumscribed rectangle of defect is set so as to have two sides along the scanning direction, and the number of only defects that have a circumscribed width of 2.88 mm or less, a circumscribed length of 2.3 mm or less, an aspect ratio of −39 to +27, an occupancy area ratio in the circumscribing rectangle of 4,000 to 6,950, and an area ratio of −3,100 to +5,200, is automatically counted as spot defects by the surface inspection system.
US10084286B2
A surface emitting laser for emitting light with a wavelength λ includes a first reflection mirror provided on a semiconductor substrate; a resonator region including an active layer provided on the first reflection mirror; a second reflection mirror, including plural low refraction index layers and plural high refraction index layers, provided on the resonator region; a contact layer provided on the second reflection mirror; a third reflection mirror provided on the contact layer; and an electric current narrowing layer provided between the active layer and the second reflection mirror or in the second reflection mirror. Optical lengths of at least one of thicknesses of the low refraction index layers and the high refraction index layers formed between the electric current narrowing layer and the contact layer are (2N+1)×λ/4 (N=1, 2, . . . ).
US10084284B2
Laser with extended mode-hop free spectral tuning ranges and methods for manufacturing such lasers are disclosed. In an embodiment the method includes providing a light emitting device, the light emitting device comprising a gain region and a first wavelength selection region and mounting the light emitting device on a thermally conductive carrier such that the gain region is mounted on a first carrier surface and the first wavelength selection region is arranged over and spaced apart from a second carrier surface.
US10084269B2
Connector receptacle tongues having contacts arranged to disconnect from corresponding contacts in a connector insert in such a way that undesirable current pathways that damage electrical components associated with the connector receptacle are avoided. Other examples include connector receptacles having a tongue in a passage and ground spring contacts located in openings in sides of the passage, where the ground spring contacts connect to a shield of a connector insert such that these undesirable current pathways are avoided.
US10084267B2
An electric circuit is provided with a single jack for connection to either a first remote powered device via a first plug or a second remote unpowered device via a second plug. A power requirement detection circuit is provided for generating a control signal representing whether the connected plug is the first plug or the second plug. A normally deactivated switch is connected between the power source and the jack and is operable to supply power to the jack when activated. A switch activation circuit is responsive to the control signal for actuating the switch when the first plug is connected.
US10084264B1
Electrical connector includes a connector body having a front side configured to engage a first electrical component and a mounting side configured to engage a second electrical component. The electrical connector also includes a plurality of signal conductors extending through the connector body. The signal conductors include mating interfaces and mounting interfaces that are positioned for engaging the first and second electrical components, respectively. The electrical connector also includes a ground structure extending generally parallel to and between two of the signal conductors. The connector body has a resonance-control surface that faces the ground structure. The resonance-control surface is shaped to include alternating distal and proximal areas. The proximal areas are closer to the ground structure than the distal areas.
US10084252B1
An electrical connector includes: an insulating body; multiple terminals, each terminal having a contact portion and at least one clamping portion forming a clamping space; and multiple solder posts, each being correspondingly placed in the clamping space. The solder post has a foundation post and a protruding portion extending upward from the foundation post. The clamping portion clamps the foundation post in the clamping space. A width of the protruding portion is smaller than a width of the foundation post. The foundation post is cylindrical. A height of the solder post is greater than a diameter of the foundation post. The solder posts are arranged more densely on the insulating body. When the electrical connector and a circuit board are together placed into a reflow oven, hot gas flows around the protruding portion more easily, and a contact area between the hot gas and the protruding portion is larger.
US10084247B2
It is aimed to reduce work man-hours when a twisted pair cable is brought into pressure contact. A connector (C) includes two insulation displacement terminal fittings (30) with which wires (41A, 41B) constituting a twisted pair cable (40A, 40B) are individually brought into pressure contact, a holder (10) configured to hold the two insulation displacement terminal fittings (30) such that pressure contact portions (34) formed in the insulation displacement terminal fittings (30) are arranged in a direction intersecting with a routing direction of the twisted pair cable (40A, 40B), and a dividing rib (37, 38) formed in the holder (10) and configured to separate two wires (41A, 41B) to correspond to two pressure contact portions (34) in the process of bringing the twisted pair cable (40A, 40B) closer to pressure contact positions with the pressure contact portions (34).
US10084244B1
A cable connector assembly, including: a body; a signal terminal and a non-signal terminal accommodated in the body, the signal terminal having a first wire-bonding end extending outside the body, and the non-signal terminal having a second wire-bonding end extending outside the body; a shielding sheet provided on the body, and having a soldering portion extending outside the body; a signal cable having a first core laser soldered to the first wire-bonding end, and a shielding layer wrapping on the first core and electrically connected with the soldering portion to form a contact area; and a non-signal cable having a second core and a second insulating layer wrapping on the second core. A front end of the contact area is flush with a rear end of the second insulating layer or is located behind it.
US10084234B2
The present disclosure provides an electronic device including a metal housing and at least one switch. The metal housing includes a peripheral frame provided with at least one micro seam band, the peripheral frame is partitioned by the at least one micro seam band to form at least one frame body, the micro seam band is formed by at least two micro seams, and a metal strip is provided between two adjacent micro seams. The switch includes a first end and a second end, the first end is electrically coupled to the frame body, and the second end is electrically coupled to the metal strip. The at least one frame body is an independent antenna. The switch includes a plurality of second ends coupled to different metal strips correspondingly, and a variety of low-frequency bandwidths of the antenna is expanded through different closed or open states of the switch.
US10084227B2
Systems and methods are provided for an antenna coupler mechanism. The antenna coupler mechanism includes a first tuning leg, a second tuning leg, and a bottom plate. The first tuning leg includes a first inductive circuit element, the first tuning leg being configured to accept a radio frequency device in series with the first inductive circuit element. The second tuning leg includes a second inductive circuit element and a capacitive circuit element connected in series, the second tuning leg being connected electrically in parallel with the first tuning leg. In addition, the bottom plate includes a third inductive circuit element connected electrically in parallel with the first tuning leg and connected electrically in parallel with the second tuning leg, the bottom plate being configured to couple energy into a nearby structure.
US10084225B2
A directional coupler includes a first to a fourth port, a main line connecting the first port and the second port, a first and a second subline section configured to be electromagnetically coupled to the main line, and a phase shifter. The first subline section, the phase shifter, and the second subline section are arranged in this order in series between the third port and the fourth port. The phase shifter outputs a signal that is phase-delayed relative to an input signal. The phase delay amount of the output signal of the phase shifter relative to the input signal increases with increasing frequency of the input signal. A frequency twice as high as the frequency of the input signal at which the phase delay amount is 90 degrees is lower than the frequency of the input signal at which the phase delay amount is 180 degrees.
US10084218B2
A battery pack having a battery pack housing defining an interior region is provided. The housing further includes an inlet aperture and an outlet aperture communicating with the interior region. The battery pack further includes a battery module that is disposed in the interior region of the battery pack housing proximate to the inlet aperture. The battery module has a first battery cell, a heat exchanger, and first and second end plates. The first battery cell and the heat exchanger are disposed against one another, and are further disposed between the first and second end plates. The heat exchanger defines a first flow path portion therethrough. The first end plate has a first end portion that extends longitudinally past the first end of the first battery cell, and a second end portion that extends longitudinally past the second end of the first battery cell.
US10084215B2
A first cell string provided in a first battery module has a larger allowable current value than a plurality of cell strings provided in second and third battery modules. The battery module is provided with a current limiting circuit that limits the charge and discharge currents of the second cell string. When the current value detected by a current sensor is zero, the switch is turned off. In this condition, when the terminal voltage value of the third cell string is different from the terminal voltage value of the second cell string, a second switch switches the connection between the second and third battery modules in order to interpose the current limiting circuit between the second and third cell strings.
US10084213B2
Various examples described herein are directed to portable renewable energy power systems comprising a solar module comprising a plurality of photovoltaic cells; a battery module comprising a plurality of battery cells; a user interface comprising at least one input device and at least one display; an alternating current/direct current (AC/DC) converter; a direct current/alternating current (DC/AC) converter; and a control module comprising at least one processor.
US10084203B2
A non-aqueous secondary battery containing: a positive electrode containing a transition metal oxide as an active material thereof; a negative electrode; and a non-aqueous liquid electrolyte containing an electrolyte, an organic solvent, and less than 0.1 mol/L of an organometallic compound containing a transition element or a rare-earth element as a central metal thereof.
US10084194B2
The invention relates to an installation (100) comprising: a power module having a fuel cell (12) and a reformer (14a), the fuel cell including a heat removal loop (24); and an absorption heat engine (40) having a first boiler (42), a condenser (46), an evaporator (48), and an absorber (50). According to the invention, a heat exchange circuit (42a) of the first boiler is inserted in the heat removal loop of the fuel cell.Furthermore, in the invention, the installation has a closed liquid circuit (10), which circuit comprises at least one heat exchanger (26, 28, 30, 32) having a heating circuit thermally coupled to the power module and a heated circuit inserted in said circulation circuit, said circulation circuit exchanging heat with said heating circuit, heating the liquid of the circulation circuit.Finally, in the invention, a heat exchange circuit (48a) of the evaporator is inserted in said closed liquid circulation circuit.
US10084189B2
A lithium ion battery cathode additive includes a core-shell coating structure formed by elemental lithium powder and a polymer coated on the surface of the elemental lithium powder, where the polymer can dissolve in a carbonic ester solvent, the polymer cannot react with N,N-dimethylformamide (DMF), N,N-dimethylacetamide (DMAc), N-2-methyl pyrrolidone (NMP), tetrahydrofuran (THF), acetone or methanol, and the polymer exists stably at a temperature of 0-150° C. The lithium ion battery cathode additive may be added in a lithium ion battery cathode material as a lithium source, for compensating lithium consumption of a battery cathode in a first-time charge-discharge process. Embodiments of the present invention further provide a fabrication method of the lithium ion battery cathode additive, a lithium ion battery cathode sheet and a lithium ion battery that include the lithium ion battery cathode additive, where the lithium ion battery has high energy density and a long cycle life.
US10084186B2
To increase capacity per weight of a power storage device, a particle includes a first region, a second region in contact with at least part of a surface of the first region and located on the outside of the first region, and a third region in contact with at least part of a surface of the second region and located on the outside of the second region. The first and the second regions contain lithium and oxygen. At least one of the first region and the second region contains manganese. At least one of the first and the second regions contains an element M. The first region contains a first crystal having a layered rock-salt structure. The second region contains a second crystal having a layered rock-salt structure. An orientation of the first crystal is different from an orientation of the second crystal.
US10084179B2
Provided is a technique capable of evenly smoothing powder supplied to the surface of a supply member. A powder coating apparatus includes a pair of press rollers, hoppers, and squeegee rollers disposed such that prescribed gaps are formed between the squeegee rollers and the press rollers, and adjusting thickness of the powder by smoothing the powder supplied to each outer circumferential surface of the press rollers. The powder coating apparatus presses the powder, smoothed by the squeegee rollers, between the press rollers to form compressed powder layers on both the surfaces of the web. The squeegee roller is formed in a column having an axis being parallel to the outer circumferential surface of the press roller and being orthogonal to a moving direction of the outer circumferential surface of the press roller.
US10084174B2
A battery module including unit cells, each of which has electrode terminals formed at one side thereof, cartridges for fixing the unit cells, respectively, and busbars coupled to the electrode terminals for electrically interconnecting the unit cells. The unit cells are mounted at the respective cartridges such that the electrode terminals are opposite to each other, and the electrode terminals are connected in parallel to each other via the busbars such that the cartridges have unit cell parallel connection structures. The cartridges are stacked such that the unit cell parallel connection structures are arranged in a height direction from a ground, and the unit cell parallel connection structures are connected to each other via a series connection member and/or a parallel connection member for connecting the unit cell parallel connection structures in series and/or in parallel to each other.
US10084172B2
Provided is a nonaqueous electrolyte secondary battery separator excellent in voltage-withstanding property. This nonaqueous electrolyte secondary battery separator has (i) a film thickness of not more than 20 μm, (ii) a peeling strength, measured by a blocking test, of not less than 0.2 N, and (iii) a puncture strength that changes through the blocking test by not more than 15%. The blocking test is carried out by (i) sandwiching, by a jig of 100 mm×100 mm, two 80 mm×80 mm pieces of a separator, (ii) allowing the two 80 mm×80 mm pieces to rest for 30 minutes under a load of 3.5 kg at a temperature of 133° C.±° C., (iii) removing the load, (iv) cooling the two 80 mm×80 mm pieces to room temperature, (vi) cutting out a specimen of 27 mm×80 mm from the two 80 mm×80 mm pieces, and then (vi) measuring a peeling strength of the specimen at 100 mm/min.
US10084168B2
Embodiments of solid-state batteries, battery components, and related construction methods are described. The components include one or more embodiments of a low melt temperature electrolyte bonded solid-state rechargeable battery electrode and one or more embodiments of a composite separator having a low melt temperature electrolyte component. Embodiments of methods for fabrication of solid-state batteries and battery components are described. These methods include co-extrusion, hot pressing and roll casting.
US10084164B2
A secondary battery includes: an electrode assembly; a case accommodating the electrode assembly and having an opening at one side thereof; a cap plate closing the opening of the case and having a first recessed groove at one end thereof and a second recessed groove at another end thereof, both the first and second recessed grooves being at an outer surface of the cap plate; a first terminal unit including: a first electrode terminal electrically connected to a first electrode plate and protruding outside of the case; a first terminal plate electrically connected to the first electrode terminal; and an insulation member coupled to the cap plate in the first recessed groove and surrounding peripheral surfaces and a bottom surface of the first terminal plate; and a second terminal unit electrically connected to the second electrode plate and coupled to the cap plate in the second recessed groove.
US10084163B2
In a manufacturing method of a sealed battery, a positive terminal is provided on one end portion of a lid and a negative terminal is provided on another end portion of the lid. An end surface on the positive terminal side of the lid is inserted into an opening, and made to contact an inside wall of the opening. Then, an end surface on the negative terminal side of the lid is inserted into the opening, and the battery can and the lid are welded together. Therefore, even if metal foreign bodies get into the battery can at the time of manufacture, they will get in on the negative terminal side, so a decrease in voltage of the sealed battery is able to be suppressed.
US10084161B2
A battery includes an electrode body having a positive electrode and a negative electrode and also includes an exterior case for receiving the electrode body. An insulation film for isolating the exterior case and the electrode body from each other is placed between an inner wall surface of the exterior case and the electrode body. The insulation film has a bag-like shape in which the electrode body is inserted. The bag-like insulation film has a gap filling section on its surface facing a side surface of the electrode body, and the gap filling section closes a gap between the electrode body and the inner wall surface of the exterior case.
US10084158B2
The invention relates to an optoelectronic component (100) comprising an organic light emitting diode (1) designed for emitting radiation and/or heat, a substrate (2), on which the organic light emitting diode is arranged, wherein the substrate (2) comprises a first substrate material (21) and at least one substrate cavity (22) which is filled with a second substrate material (23) different than the first substrate material (21), wherein the second substrate material (23) is designed to dissipate the heat emitted by the organic light emitting diode (1).
US10084147B2
A display device is provided. The display device includes a first substrate having a light-emitting region and a first transparent region. The first substrate includes a plurality of transistors and at least one light-emitting diode disposed in the light-emitting region. The light-emitting diode includes a first electrode electrically connected to the corresponding transistor and a first semiconductor layer disposed over the first electrode. The light-emitting diode also includes a second semiconductor layer disposed over the first semiconductor layer and a light-emitting layer disposed between the first semiconductor layer and the second semiconductor layer, wherein the distance between the top surface of the first electrode and the top surface of the second semiconductor layer is between 2 μm and 12 μm.
US10084144B2
A diffusing substrate for a device having an organic light-emitting diode including a sheet of glass coated on one of the surfaces thereof with a layer including a vitreous material, such that the vitreous material has a chemical composition including the following components, which vary within the weight limits defined below: Bi2O360-85% B2O35-12% SiO26-20% MgO + ZnO0-9.5% Al2O30-7% Li2O + Na2O + K2O0-5% CaO0-5% BaO0-20%.
US10084121B2
Small LED sources with high brightness and high efficiency apparatus including the small LED sources and methods of using the small LED sources are disclosed.
US10084119B2
A light-emitting device (1) includes a substrate (2); a wiring pattern (3), an electrode land (4), a sealing resin layer (5), a wire (7), and a resin dam (9) that are disposed on the substrate (2); at least one light-emitting element (6) that emits light having a peak emission wavelength in a wavelength range of 430 to 480 nm; a green phosphor (10) that is excited by primary light emitted from the light-emitting element (6) to emit light having a peak emission wavelength in a green region; and a first red phosphor (11) that is excited by the primary light to emit light having a peak emission wavelength in a red region. The first red phosphor (11) emits no light in a wavelength range of 700 nm or more and absorbs no light in a wavelength range of 550 to 600 nm.
US10084109B1
A semiconductor structure for improving the gate metal adhesion and the Schottky stability, comprising: a III-nitride semiconductor having a top surface on which a conductive area and a non-conductive area are defined; a source contact metal and a first drain contact metal forming ohmic contact with the III-nitride semiconductor on the conductive area, and the first drain contact metal provided at one side of the source contact metal; and a gate metal layer comprising a gate connection line and a first gate finger extending from the gate connection line, the first gate finger interposing between the source contact metal and the first drain contact metal and forming a Schottky contact with the III-nitride semiconductor on the conductive area, wherein the first gate finger has a first terminal anchor at an end thereof surrounding the source contact metal, and the first terminal anchor has an increased width.
US10084103B1
A thin film and a method of making a thin film. The thin film comprises a patterned substrate, a smooth film of electric field tuned quantum dots solution positioned on the patterned substrate, and a thin layer of metal positioned on the thin film. The method begins by drop-casting a quantum dots solution onto a patterned substrate to create a thin film. While the quantum dots solution is drying, a linearly increasing electric filed is applied. The thin film is then placed in a deposition chamber and a thin layer of metal is deposited onto the thin film. Also included are a method of measuring the photoinduced charge transfer (PCT) rate in a quantum dot nanocomposite film and methods of forming a Shottky barrier on a transparent ITO electrode of a quantum dot film.
US10084096B2
After a sputtering gas is supplied to a deposition chamber, plasma including an ion of the sputtering gas is generated in the vicinity of a target. The ion of the sputtering gas is accelerated and collides with the target, so that flat-plate particles and atoms of the target are separated from the target. The flat-plate particles are deposited with a gap therebetween so that the flat plane faces a substrate. The atom and the aggregate of the atoms separated from the target enter the gap between the deposited flat-plate particles and grow in the plane direction of the substrate to fill the gap. A film is formed over the substrate. After the deposition, heat treatment is performed at high temperature in an oxygen atmosphere, which forms an oxide with a few oxygen vacancies and high crystallinity.
US10084088B2
A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.
US10084086B2
A method of embedding SiGe when fabricating a PMOS device is provided. Multiple layers of SiGe layers with different Ge contents may be formed such that the Ge content increases to from bottom layer(s) to middle layer(s), and decreases from the middle layer(s) to top layer(s). In some embodiments, the embedded SiGe can have a SiGe seed layer over a substrate, a first SiGe transition layer over the SiGe seed layer, a SiGe milled layer over the first SiGe transition layer, and a second SiGe transition layer over the SiGe middle layer. The first SiGe transition layer can have a Ge content increasing from a bottom of the first SiGe transition layer to a top of the first SiGe transition layer. The second SiGe transition layer can have a Ge content decreasing from a bottom of the second SiGe transition layer to a top of the second SiGe transition layer.
US10084084B2
A ferroelectric field effect transistor comprises a semiconductive channel comprising opposing sidewalls and an elevationally outermost top. A source/drain region is at opposite ends of the channel. A gate construction of the transistor comprises inner dielectric extending along the channel top and laterally along the channel sidewalls. Inner conductive material is elevationally and laterally outward of the inner dielectric and extends along the channel top and laterally along the channel sidewalls. Outer ferroelectric material is elevationally outward of the inner conductive material and extends along the channel top. Outer conductive material is elevationally outward of the outer ferroelectric material and extends along the channel. Other constructions and methods are disclosed.
US10084080B2
A tunneling transistor is implemented in silicon, using a FinFET device architecture. The tunneling FinFET has a non-planar, vertical, structure that extends out from the surface of a doped drain formed in a silicon substrate. The vertical structure includes a lightly doped fin defined by a subtractive etch process, and a heavily-doped source formed on top of the fin by epitaxial growth. The drain and channel have similar polarity, which is opposite that of the source. A gate abuts the channel region, capacitively controlling current flow through the channel from opposite sides. Source, drain, and gate terminals are all electrically accessible via front side contacts formed after completion of the device. Fabrication of the tunneling FinFET is compatible with conventional CMOS manufacturing processes, including replacement metal gate and self-aligned contact processes. Low-power operation allows the tunneling FinFET to provide a high current density compared with conventional planar devices.
US10084079B2
A semiconductor device includes a first well disposed in a substrate and including a first impurity of a first conductivity type, a second well disposed in the substrate, including a second impurity of a second conductivity type different from the first conductivity type, and having first to third portions, and a gate structure formed on the first well and the second well, wherein the second portion is disposed between the first portion and the third portion, the first portion and the third portion are formed deeper than the second portion, and concentration of the second impurity of the first portion and the third portion is greater than concentration of the second impurity of the second portion.
US10084078B2
In a semiconductor device using a nitride semiconductor, a MISFET is prevented from having deteriorated controllability which will otherwise occur when a tungsten film, which configures a gate electrode of the MISFET, has a tensile stress. A gate electrode of a MISFET having an AlGN/GaN heterojunction is formed from a tungsten film having grains with a relatively small grain size and having no tensile stress. The grain size of the grains of the tungsten film is smaller than that of the grains of a barrier metal film configuring the gate electrode and formed below the tungsten film.
US10084075B2
A transistor device is provided that comprises a base structure, and a superlattice structure overlying the base structure and comprising a multichannel ridge having sloping sidewalls. The multichannel ridge comprises a plurality of heterostructures that each form a channel of the multichannel ridge, wherein a parameter of at least one of the heterostructures is varied relative to other heterostructures of the plurality of heterostructures. The transistor device further comprises a three-sided gate contact that wraps around and substantially surrounds the top and sides of the multichannel ridge along at least a portion of its depth.
US10084072B2
A semiconductor device in which a shift of the threshold voltage of a transistor is suppressed is provided. A semiconductor device in which a decrease in the on-state current of a transistor is suppressed is provided. The semiconductor device is manufactured as follows: forming a gate electrode layer over a substrate; forming a gate insulating film over the gate electrode layer; forming an oxide semiconductor film over the gate insulating film; forming a metal oxide film having a higher reducing property than the oxide semiconductor film over the oxide semiconductor film; performing heat treatment while the metal oxide film and the oxide semiconductor film are in contact with each other, thereby the metal oxide film is reduced so that a metal film is formed; and processing the metal film to form a source electrode layer and a drain electrode layer.
US10084065B1
During a fabrication of a semiconductor device, a recess is created in a substrate material disposed along a direction of a plane of fabrication. A layer of a removable material is formed in the recess. A bottom layer is formed above the layer of removable material. A vertical channel above the bottom layer is formed in a direction substantially orthogonal to the direction of the plane of fabrication. A gate is formed using a metal above the bottom layer and relative to the vertical channel. A tunnel is created under the bottom layer by removing the removable material from under the bottom layer such that the backside of the bottom layer forms a ceiling of the tunnel. The tunnel is filled using a conductive material such that the conductive material makes electrical contact with the backside of the bottom layer.
US10084061B2
The present disclosure provides an integrated circuit. The integrated circuit includes a semiconductor substrate; and a passive polysilicon device disposed over the semiconductor substrate. The passive polysilicon device further includes a polysilicon feature; and a plurality of electrodes embedded in the polysilicon feature.
US10084060B2
The present disclosure provide a semiconductor structure, including a substrate having a top surface; a gate over the substrate, the gate including a footing region in proximity to the top surface, the footing region including a footing length laterally measured at a height under 10 nm above the top surface; and a spacer surrounding a sidewall of the gate, including a spacer width laterally measured at a height of from about 10 nm to about 200 nm above the top surface. The footing length is measured, along the top surface, from an end of a widest portion of the footing region to a vertical line extended from an interface between a gate body and the spacer, and the spacer width is substantially equal to or greater than the footing length.
US10084055B2
A method is presented for forming a nanosheet structure having a uniform threshold voltage (Vt). The method includes forming a conductive barrier surrounding a nanosheet, forming a first work function conducting layer over the conductive barrier layer, and forming a conducting layer adjacent the first work function conducting layer, the conducting layer defining a first region and a second region. The method further includes forming a second work function conducting layer over the second region of the conducting layer to compensate for threshold voltage offset between the first and second regions of the conducting layer.
US10084048B2
A semiconductor device with favorable electrical characteristics is provided. Alternatively, a semiconductor device with a high on-state current is provided. Alternatively, a semiconductor device that is suitable for miniaturization is provided. A semiconductor device includes an oxide semiconductor, an insulating film, a gate insulating film, and a gate electrode. The oxide semiconductor includes a first portion and a second portion over the first portion. The insulating film includes a region in contact with a side surface of the first portion. The gate electrode includes a region that covers the second portion with the gate insulating film provided therebetween.
US10084047B2
A semiconductor structure includes a substrate, a transition body over the substrate, a group III-V intermediate body having a bottom surface over the transition body and a group III-V device layer over a top surface of the group III-V intermediate body. The group III-V intermediate body has a first impurity concentration at the bottom surface, a second impurity concentration at the top surface, and a variable impurity concentration that rises and falls between the bottom surface and the top surface. The first impurity concentration is greater than the second impurity concentration.
US10084041B2
Isolation structures are formed to laterally surround a gate material block such that each sidewall of the gate material block abuts a corresponding sidewall of the isolation structures. Sidewalls of the gate material bock define ends of gate structures to be subsequently formed. The isolation structures obstruct lateral growth of a semiconductor material during a selective epitaxial grown process in formation of source/drain regions, thereby preventing merging of the source/drain regions at the ends of gate structures. As a result, a lateral distance between each sidewall of the gate material block and a corresponding outermost sidewall of an array of a plurality of semiconductor fins can be made sufficiently small without causing the electrical shorts of the source/drain regions.
US10084019B2
Disclosed are an organic light-emitting array and an organic light-emitting display device using the organic light-emitting array. The organic light-emitting array includes a substrate having a plurality of sub-pixels, each sub-pixel including an emission portion and a non-emission portion adjacent the emission portion; a first electrode provided on at least the emission portion and provided on a portion of the non-emission portion for each sub-pixel; a bank provided in the non-emission portion and having a positively tapered portion configured to overlap a portion of the first electrode and a negatively tapered portion configured so as not to overlap the first electrode; an organic layer provided on the first electrode and the bank; and a second electrode disposed on the organic layer over the plurality of sub-pixels.
US10084018B2
An image sensor including a semiconductor substrate integrated with a plurality of photo-sensing devices and a nanopattern layer on the semiconductor substrate, the nanopattern layer having a plurality of nanopatterns, wherein each nanopattern of the plurality of nanopatterns correspond one to one with a single photo-sensing device of the plurality of photo-sensing devices, respectively.
US10084017B2
A switch device includes: a first electrode; a second electrode disposed to oppose the first electrode; a switch layer provided between the first electrode and the second electrode, and including at least one or more kinds of chalcogen elements and one or more kinds of first elements out of the one or more kinds of chalcogen elements, the one or more kinds of first elements, and a second element including one or both of oxygen (O) and nitrogen (N), the one or more kinds of chalcogen elements being selected from tellurium (Te), selenium (Se), and sulfur (S), and the one or more kinds of first elements being selected from boron (B), carbon (C), and silicon (Si).
US10084013B2
A thin-film transistor includes a substrate, a gate electrode formed on a surface of the substrate, a gate protection layer and a semiconductor layer stacked on the gate electrode, and an etch stop layer, source terminal metal, and drain terminal metal formed on a surface of the semiconductor layer in such a way that the source terminal metal and the drain terminal metal are respectively located on two opposite sides of the etch stop layer. The thin-film transistor further includes a light shielding layer, an insulation medium layer, and a pixel electrode. The light shielding layer is stacked on the etch stop layer to prevent light from irradiating the semiconductor layer. The insulation medium layer covers the source terminal metal, the drain terminal metal, and the light shielding layer. The pixel electrode is formed on a surface of the insulation medium layer and electrically connected to the drain terminal metal.
US10084009B2
A light-emitting diode structure includes light-emitting diode units, and a separation unit, where one of the light-emitting diode units includes a stacked structure including an n-type semiconductor layer, a p-type semiconductor layer, and a photo-active layer arranged between the n-type semiconductor layer and the p-type semiconductor layer, a first electrode, which faces a surface of the stacked structure and is electrically connected to one of the n-type semiconductor layer and the p-type semiconductor layer, and a second electrode, which faces the surface of the stacked structure opposite to the surface faced by the first electrode and is electrically connected to one of the n-type semiconductor layer and the p-type semiconductor layer, and the separation unit is arranged between at least two adjacent light-emitting diode units among the light-emitting diode units and separates the two light-emitting diode units from each other.
US10084002B2
Disclosed herein is a solid-state imaging apparatus including: a semiconductor base; a photodiode created on the semiconductor base and used for carrying out photoelectric conversion; a pixel section provided with pixels each having the photodiode; a first wire created by being electrically connected to the semiconductor base for the pixel section through a contact section and being extended in a first direction to the outside of the pixel section; a second wire made from a wiring layer different from the first wire and created by being extended in a second direction different from the first direction to the outside of the pixel section; and a contact section for electrically connecting the first and second wires to each other.
US10084000B2
An array substrate and manufacturing method thereof, a display panel and a display device are provided. The array substrate includes a display area and a peripheral circuit area. The method includes forming an amorphous silicon thin film on the base substrate, forming a first amorphous silicon layer in the display area and a second amorphous silicon layer in the peripheral circuit area by a patterning process, so that a thickness of the first amorphous silicon layer is less than a thickness of the second amorphous silicon layer; and processing the first amorphous silicon layer and the second amorphous silicon layer simultaneously by an excimer laser annealing to form a first poly-silicon layer in the display area and a second poly-silicon layer in the peripheral circuit area, a grain size of the first poly-silicon layer being less than a grain size of the second poly-silicon layer.
US10083992B2
A display device includes a first substrate having an active area, a circuit area extending outwardly from the active area, and a cell seal area extending outwardly from the circuit area, a second substrate covering the first substrate, a sealing part between the first substrate and the second substrate, the sealing part covering at least a portion of the circuit area, a wiring part in the circuit area of the first substrate and electrically connected to elements in the active area of the first substrate, the wiring part including at least one level-difference compensation part, and a stepped part between the sealing part and at least a portion of the wiring part, the at least one level-difference compensation part of the wiring part being adjacent to the stepped part.
US10083989B2
A semiconductor device is provided to include a flexible substrate, a barrier layer, a heat insulating layer, a device layer, a dielectric material later and a stress absorbing layer. The barrier layer is disposed on the flexible substrate. The heat insulating layer is disposed on the barrier layer, wherein the heat insulating layer has a thermal conductivity of less than 20 W/mK. The device layer is disposed on the heat insulating layer. The dielectric material layer is disposed on the device layer, and the dielectric material layer and the heat insulating layer include at least one trench. The stress absorbing layer is disposed on the dielectric material layer, and the stress absorbing layer fills into the at least one trench.
US10083975B2
A control voltage searching method is provided. Firstly, a control pulse with a preset control voltage and a preset pulse width is generated, and a control action on a memory cell. If the pulse count of the control pulse is smaller than a first number, the control voltage plus a first increment is set as an updated value of the control voltage. If the pulse count of the control pulse is not smaller than a first number, a first-stage verifying action is performed to judge whether the memory cell passes a first-stage verification test. If the memory cell passes the first-stage verification test, a second-stage verifying action is performed to judge whether the memory cell passes a second-stage verification test. If the memory cell passes the second-stage verification test, a target value of the control voltage is acquired.
US10083974B1
A floating memristor with a nano-battery between a top and bottom floating gates is disclosed. The floating memristor includes a nano-battery, a top floating gate assembly disposed on an anode of the nano-battery, and a bottom floating gate assembly disposed on a cathode of the nano-battery. The floating memristor is an artificial synapse. The top floating gate assembly and the anode of the nano-battery convert electric signal to ionic signal by tunneling effect and field effect to simulate a presynaptic membrane. The electrolyte of the nano-battery is an ionic channel as a synaptic gap. The anode and the bottom floating gate transfer the ionic signal to electric signal by field effect and tunneling effect to simulate a postsynaptic membrane.
US10083972B2
The method includes forming a first opening in a dielectric layer exposing a source drain region of an SRAM device and forming a second opening in the dielectric layer exposing a source drain region of a logic device, forming a third opening in the dielectric layer exposing a gate of the SRAM device and forming a fourth opening in the dielectric layer exposing a gate of the logic device, forming a first sidewall spacer in the third opening and forming a second sidewall spacer in the fourth opening, recessing a portion of the first sidewall spacer without recessing the second sidewall spacer, forming a strapped contact in the first and third openings, the strapped contact creates an electrical connection between the source drain region of the SRAM device and the gate of the SRAM device, the electrical connection is directly above a remaining portion of the first sidewall spacer.
US10083968B1
A semiconductor structure for a memory device includes a substrate including a memory cell region and a peripheral circuit region defined thereon, at least an active region formed in the peripheral circuit region, a buried gate structure formed in the active region in the peripheral circuit region, a conductive line structure formed on the buried gate structure, and at least a bit line contact plug formed in the memory cell region.
US10083966B2
First and second active regions are doped with different types of impurities, and extend in a first direction and spaced apart from each other in a second direction. First and third gate structures, which are on the first active region and a first portion of the isolation layer between the first and second active regions, extend in the second direction and are spaced apart from each other in the first direction. Second and fourth gate structures, which are on the second active region and the first portion, extend in the second direction, are spaced apart from each other in the first direction, and face and are spaced apart from the first and third gate structures, respectively, in the second direction. First to fourth contacts are on portions of the first to fourth gate structures, respectively. The first and fourth contacts are connected, and the second and third contacts are connected.
US10083957B2
According to one embodiment, a semiconductor device includes a first electrode, first regions, second regions, an eighth semiconductor region, a ninth semiconductor region of the second conductivity type, a tenth semiconductor region, second electrodes, and a third electrode. Each first region includes a first semiconductor region, a second semiconductor region, a third semiconductor region, a fourth semiconductor region, and a gate electrode. The first regions and the second regions alternate in the second direction. Each of the second regions includes a fifth semiconductor region, a sixth semiconductor region, and a seventh semiconductor region. The eighth semiconductor region is provided between the first semiconductor regions and between the fifth semiconductor regions. The eighth semiconductor region is electrically connected to the first semiconductor regions. The third electrode is provided on the tenth semiconductor region with a first insulating layer interposed. The third electrode is electrically connected to the gate electrodes.
US10083956B2
A semiconductor device includes first and second electrodes, a first semiconductor region between the first and second electrodes, a second semiconductor region between the first semiconductor region and the second electrode, a third semiconductor region between the first semiconductor region and the second electrode, a fourth semiconductor region between the first semiconductor region and the first electrode, a third electrode between the first electrode and the first semiconductor region, a first insulating film between the third electrode and both the first electrode and the first semiconductor region, a fifth semiconductor region between the fourth semiconductor region and the first electrode and in contact with the first electrode, a sixth semiconductor region between the fourth semiconductor region and the first electrode and in contact with the first electrode, and a seventh semiconductor region between the fourth semiconductor region and the first insulating film and in contact with the first semiconductor region.
US10083946B2
A bottom package includes a molding compound, a buffer layer over and contacting the molding compound, and a through-via penetrating through the molding compound. A device die is molded in the molding compound. A guiding trench extends from a top surface of the buffer layer into the buffer layer, wherein the guiding trench is misaligned with the device die.
US10083944B2
A display device including a growth substrate; a plurality of semiconductor light emitting devices grown on the growth substrate and disposed on one surface of the growth substrate; a plurality of through holes passing through the growth substrate at positions overlapping with the semiconductor light emitting devices; a wavelength conversion material filled into the through holes to convert a wavelength of light emitted from corresponding semiconductor light emitting devices; and a wiring substrate electrically connected to an electrode of the semiconductor light emitting devices disposed at an opposite side of the growth substrate by interposing the semiconductor light emitting devices therebetween.
US10083940B2
Some embodiments relate to a semiconductor device. The semiconductor device includes a substrate. A first die is coupled beneath a lower surface of the substrate. A second die is coupled beneath the lower surface of the substrate and is disposed over the first die. A thermal contact pad is arranged beneath a lower surface of the second die and an upper surface of the first die. The thermal contact pad thermally isolates the first die from the second die.
US10083936B2
Package assemblies for and methods of packaging integrated circuit chips are described. Disclosed package assemblies have spacers and recessed regions comprising IC chips. Architectural structures are provided that enable, for example, three dimensional (3D) packaging (or system in package (SiP) or multi-chip modules), systems-on-chip 3D packaging, and hybrid 3D bonding. Embodiments of the invention can be used, for example, to create logic-to-memory, memory-to-memory, and logic-to-logic interface stacking assemblies.
US10083935B2
A semiconductor device including semiconductor units 20A to 20C that each include semiconductor elements 12 and 13, a unit case 11 sealing the semiconductor elements, and a first unit terminal 16 exposed inside a first recessed portion 11a provided in a top surface of the unit case; a first unit connection portion 40a including, in correspondence with each of the semiconductor units, a first connection terminal 43S connected to the first unit terminal, a first connection conductor 43S0 connected between a plurality of the first connection terminals, and a first connection conductor sealing portion 40a0 sealing the first connection conductor while exposing the first connection terminals; and first recessed sealing portions 45a that each, in correspondence with each of the semiconductor units, seal each connection portion between the first unit terminal and the first connection terminal inside a recess of the first recessed portion.
US10083931B2
Microelectronic devices and method of forming a plurality of microelectronic devices on a semiconductor workpiece are disclosed herein. One such method includes placing a plurality of first interconnect elements on a side of a semiconductor workpiece, forming a layer on the side of the workpiece, reshaping the first interconnect elements by heating the first interconnect elements, and coupling a first portion of a plurality of individual second interconnect elements to corresponding first interconnect elements with a second portion of the individual second interconnect elements exposed.
US10083930B2
A semiconductor device reducing parasitic loop inductance of system for the switching converter. The semiconductor device has an input voltage pin, a ground reference pin, a switching pin, and a semiconductor die, wherein the semiconductor die comprises a high-side power switch and a low-side power switch and a metal connection. The metal connection directly connects the high-side power switch and the first terminal of the low-side power switch, and is along and proximity to an edge of the semiconductor device to which the input voltage pin is distributed.
US10083926B1
A wafer level chip scale package is described. At least one redistribution layer is connected to a wafer through an opening through a first polymer layer to a metal pad on a top surface of the wafer wherein the redistribution layer has a roughened top surface and wherein holes are formed through the at least one redistribution layer in an area where the redistribution layer has an area exceeding 0.2 mm2. At least one UBM layer contacts the at least one redistribution layer through an opening in a second polymer layer wherein the second polymer layer contacts the first polymer layer within the holes promoting cohesion between the first and second polymer layers and wherein the roughened top surface promotes adhesion between the at least one redistribution layer and the second polymer layer.
US10083925B2
A packaging process of an electronic component includes the following steps. Firstly, a semi-package unit is provided. The semi-package unit includes a first insulation layer and an electronic component. The electronic component is partially embedded within the first insulation layer. The electronic component includes at least one conducting terminal. Then, a metal layer is formed over the surface of the semi-package unit and a part of the metal layer is removed, so that a metal mask is formed on the surface of the semi-package unit and the at least one conducting terminals is exposed. Then, a metal re-distribution layer is formed on the metal mask and the at least one conducting terminal. Then, a part of the metal re-distribution layer and a part of the metal mask are removed, so that at least one contact pad corresponding to the at least one conducting terminal is produced.
US10083924B2
A semiconductor device includes: a pad electrode 9a formed in an uppermost layer of a plurality of wiring layers; a base insulating film 11 having an opening 11a on the pad electrode 9a; a base metal film UM formed on the base insulating film 11; a redistribution line RM formed on the base metal film UM; and a cap metal film CM formed so as to cover an upper surface and a side surface of the redistribution line RM. In addition, in a region outside the redistribution line RM, the base metal film UM made of a material different from that of the redistribution line RM and the cap metal film CM made of a material different from the redistribution line RM are formed between the cap metal film CM formed on the side surface of the redistribution line RM and the base insulating film 11, and the base metal film UM and the cap metal film CM are in direct contact with each other in the region outside the redistribution line RM.
US10083923B2
Embodiments of the invention may include a packaged device that includes thermally stable radio frequency integrated circuits (RFICs). In one embodiment the packaged device may include an integrated circuit chip mounted to a package substrate. According to an embodiment, the package substrate may have conductive lines that communicatively couple the integrated circuit chip to one or more external components. One of the external components may be an RFIC module. The RFIC module may comprise an RFIC and an antenna. Additional embodiments may also include a packaged device that includes a plurality of cooling spots formed into the package substrate. In an embodiment the cooling spots may be formed proximate to interconnect lines the communicatively couple the integrated circuit chip to the RFIC.
US10083919B2
Disclosed are chip packaging structures for high speed chip to chip and chip to carrier communications and methods of making such structures. The chip packaging structures do not require an interposer containing through silicon vias and/or provide structures having reduced warping.
US10083917B1
A power electronics assembly includes a semiconductor device, a metal substrate, and a cooling structure. The metal substrate includes a plurality of stress-relief features that extend at least partially through a thickness of the metal substrate. The plurality of stress-relief features are at least partially filled with a transient liquid phase (TLP) bonding material. The semiconductor device is positioned over the plurality of stress-relief features and thermally bonded to the metal substrate via TLP bonding material. Vehicles having power electronics assemblies with stress-relief through-features are also disclosed.
US10083912B2
A package substrate having an opening and through-substrate interconnect structures is attached to a temporary carrier such as an adhesive film. The active surface of an IC die is placed in contact with the carrier substrate within the opening, to temporarily attach the die to the carrier substrate. Another die is attached to the side of the first die furthest from the carrier substrate. In one embodiment, the dies are attached to each other using an epoxy so that their respective non-active surfaces face each other. Bond wires are connected between interconnects at the active surface of the second die and the substrate. The wires are then encapsulated. After removal of the carrier substrate, a build-up interconnect structure is formed that includes external interconnects of the package substrate, such as solder balls of a ball grid array package.
US10083904B2
Methodologies and a device for reducing capacitance and improving profile control are provided. Embodiments include forming metal vias in a first dielectric layer; forming a graded interlayer dielectric over the metal vias; forming a metal layer in the graded ILD over one of the metal vias; and forming a hydrogenated amorphous silicon carbon film over the metal layer.
US10083903B1
A method of manufacture of an integrated packaging system includes: providing a substrate; mounting an integrated circuit on the substrate; mounting an interposer substrate having an interposer pad on the integrated circuit; covering an encapsulant over the integrated circuit and the interposer substrate; forming a hole through the encapsulant aligned over the interposer pad; and placing a conductive connector on and in direct contact with the interposer pad.
US10083891B1
An IC chip package includes: a base substrate; an interposer substrate including a plurality of wires therein, the interposer substrate operatively coupled to the base substrate; and a processor operatively positioned on the interposer substrate. A memory is operatively positioned on the interposer substrate and operatively coupled to the processor through the interposer substrate. The memory includes: a 3D DRAM stack, a thermoelectric heat pump coupled directly to an uppermost layer of the 3D DRAM stack, and a memory controller operatively coupled to the 3D DRAM stack to control operation of the 3D DRAM stack. A temperature controller operatively coupled to the thermoelectric heat pump controls a temperature of the 3D DRAM stack using the thermoelectric heat pump. A lid may thermally couple to an uppermost surface of the processor and an uppermost surface of the thermoelectric heat pump.
US10083888B2
A semiconductor device package includes a conductive base, and a cavity defined from a first surface of the conductive base, the cavity having a bottom surface and a depth. A semiconductor die is disposed on the bottom surface of the cavity, the semiconductor die having a first surface and a second surface opposite the first surface. The second surface of the semiconductor die is bonded to the bottom surface of the cavity. A distance between the first surface of the semiconductor die and the first surface of the conductive base is about 20% of the depth of the cavity.
US10083887B2
The present invention provides a chip component-embedded resin multilayer substrate including a laminating body obtained by laminating a plurality of resin layers, a predetermined wiring conductor disposed in the laminating body, and a chip component embedded in the laminating body and having a side terminal electrode. A guarding member electrically isolated from the wiring conductor is provided to cover at least a part of a boundary between the side terminal electrode and the resin layers when viewed from a lamination direction of the laminating body, and the guarding member is formed from a material having a melting point higher than a temperature at which the resin layer begins to flow.
US10083883B2
Embodiments include devices and methods for detecting particles, monitoring etch or deposition rates, or controlling an operation of a wafer fabrication process. In an embodiment, a particle monitoring device for particle detection includes several capacitive micro sensors mounted on a wafer substrate to detect particles under all pressure regimes, e.g., under vacuum conditions. In an embodiment, one or more capacitive micro sensors is mounted on a wafer processing tool to measure material deposition and removal rates in real-time during the wafer fabrication process. Other embodiments are also described and claimed.
US10083861B2
A method for filling gaps between structures includes forming a plurality of high aspect ratio structures adjacent to one another with gaps, forming a first dielectric layer on tops of the structures and conformally depositing a spacer dielectric layer over the structures. The spacer dielectric layer is removed from horizontal surfaces and a protection layer is conformally deposited over the structures. The gaps are filled with a flowable dielectric, which is recessed to a height along sidewalls of the structures by a selective etch process such that the protection layer protects the spacer dielectric layer on sidewalls of the structures. The first dielectric layer and the spacer dielectric layer are exposed above the height using a higher etch resistance than the protection layer to maintain dimensions of the spacer layer dielectric through the etching processes. The gaps are filled by a high density plasma fill.
US10083854B2
A method for surface treatment of an at least primarily crystalline substrate surface of a substrate such that by amorphization of the substrate surface, an amorphous layer is formed at the substrate surface with a thickness d>0 nm of the amorphous layer. This invention also relates to a corresponding device for surface treatment of substrates.
US10083852B1
Edge grippers are disposed around an outer edge of a chuck. Each of the edge grippers includes a finger configured to pivot around a point; a contact pad configured to contact the wafer; and a flexure disposed between the contact pad and the finger. The flexure is configured to flex toward and away from the chuck. The chuck can use a matrix of vacuum and pressure nozzles designed to keep a wafer floating above the chuck. The edge grippers can hold the wafer at the edge while minimizing deformation of the wafer or without affecting z-jitter of the wafer.
US10083846B2
An apparatus for bonding semiconductor chips may comprise transfer rails configured to transfer substrates, loading members configured to load the substrates onto the transfer rails, unloading members configured to unload the substrates from the transfer rails, a first wafer supply unit configured to supply a first wafer including semiconductor chips, and/or a bonding unit configured to bond the semiconductor chips to the substrates. An apparatus for bonding semiconductor chips may comprise a transfer rail configured to transfer substrates, loading members configured to load the substrates onto the transfer rail, unloading members configured to unload the substrates from the transfer rail, a buffer member at a side of the transfer rail configured to temporarily receive the substrates loaded by the loading members, a first wafer supply unit configured to supply a first wafer including semiconductor chips, and/or a bonding unit configured to bond the semiconductor chips to the substrates.
US10083843B2
Laser annealing systems and methods with ultra-short dwell times are disclosed. The method includes locally pre-heating the wafer with a pre-heat line image and then rapidly scanning an annealing image relative to the pre-heat line image to define a scanning overlap region that has a dwell time is in the range from 10 ns to 500 ns. These ultra-short dwell times are useful for performing surface or subsurface melt annealing of product wafers because they prevent the device structures from reflowing.
US10083833B1
Various implementations described herein are directed to a method for manufacturing an integrated circuit. The method may include defining multiple lithographic regions for the integrated circuit, and the multiple lithographic regions may include a first lithographic region and a second lithographic region. The method may include defining an anchor in the first lithographic region and defining a target in the second lithographic region. The method may include defining a spacing interval between the anchor and the target. The method may include inserting an integration fill in the spacing interval.
US10083832B1
Under layer composition and methods of manufacturing semiconductor devices are disclosed. The method of manufacturing semiconductor device includes the following steps. A layer of an under layer composition is formed, wherein the under layer composition includes a polymeric material and a cross-linker, and the cross-linker includes at least one decomposable functional group. A curing process is performed on the layer of the under layer composition to form an under layer, wherein the cross-linker is crosslinked with the polymeric material to form a crosslinked polymeric material having the at least one decomposable functional group. A patterned photoresist layer is formed over the under layer. An etching process is performed to transfer a pattern of the patterned photoresist layer to the under layer. The under layer is removed by decomposing the decomposable functional group.
US10083829B2
Disclosed are an apparatus for treating a substrate and a method of treating substrates. The apparatus includes an inlet valve through which a supercritical fluid flows into the process chamber until an inner pressure of the process chamber reaches a first pressure and a turbulent flow generator turbulently supplementing the supercritical fluid into the process chamber until the inner pressure of the process chamber is recovered to the first pressure. A pressure drop module partially removes a supercritical mixture from the process chamber until the inner pressure of the process chamber is dropped to the second pressure. A pressure drop mode and a supplemental mode may be alternately repeated by the flow controller.
US10083827B2
Embodiments of the present invention generally relate to simplified, high voltage, tungsten halogen lamps for use as source of heat radiation in a rapid thermal processing (RTP) chamber or other lamp heated thermal processing chambers. Embodiments include a lamp design that includes an external fuse while reducing the number of part and expense of prior art lamps. In addition, embodiments of the lamps described herein provide sufficient rigidity to handle compressive forces of inserting the lamps into a heating assembly base, while maintaining a simplified fuse design.
US10083813B2
A multicolumn charged particle beam exposure apparatus includes a plurality of column cells which generate charged particle beams, and the column cell includes a yoke which is made of a magnetic material and generates a magnetic field of a predetermined intensity distribution around an optical axis of the column, and a coil which is wound around the yoke. The coil includes a plurality of divided windings, which are driven by different power sources.
US10083811B2
A switching system includes a MEMS switching circuit having a MEMS switch and a driver circuit. An auxiliary circuit is coupled in parallel with the MEMS switching circuit, the auxiliary circuit comprising first and second connections that connect the auxiliary circuit to the MEMS switching circuit on opposing sides of the MEMS switch, first and second solid state switches connected in parallel, and a resonant circuit connected between the first and second solid state switches. A control circuit controls selective switching of a load current towards the MEMS switching circuit and the auxiliary circuit by selectively activating the first and second solid state switches and the resonant circuit so as to limit a voltage across the MEMS switch by diverting at least a portion of the load current away from the MEMS switch to flow to the auxiliary circuit prior to the MEMS switch changing state.
US10083806B2
An input mechanism is disclosed. The input mechanism includes a dome support structure defining an opening that extends through the dome support structure, a collapsible dome positioned in the opening and engaged with the dome support structure, and a cover member coupled to the dome support structure and covering the collapsible dome, thereby retaining the collapsible dome within the opening of the dome support structure.
US10083804B2
A speed control switch includes a base. An upper end of the base is provided with a switch assembly. A side of the base is provided with a PCB board and a slide terminal. The PCB board is provided with a first contact plate. The slide terminal is slidably connected with the first contact plate. The base is provided with a trigger assembly for driving the slide terminal to slide along the first contact plate and to close the switch assembly. The speed control switch can regulate the speed of a motor precisely. The structure is compact to reduce the size of the switch, so that it is convenient for operation.
US10083800B2
First, the present invention involves adding a curing catalyst to a phenolic resin, polyvinyl alcohol, a pore-forming agent, and a cross-linking agent, and mixing, casting, heating, and drying the same. Next, the plate-shaped porous phenolic resin obtained thereby which has uniform consecutive macropores having an average pore diameter in the range of 3 to 35 μm and formed in a three-dimensional network pattern is immersed with an organic solvent. Thereafter, this block is extracted and pressure is applied thereto. It is possible to obtain plate-shaped activated carbon for use in an electrode of a power-storage device by carbonizing and activating a block which has undergone this procedure by keeping the same at an increased temperature.
US10083791B2
In an integrated magnetic component for a switched mode power converter, comprising two magnetic cores forming an 8-shaped core structure and at least two first electric winding wires, wherein at least one magnetic core is an E-core, at least one of the first electric winding wires is wound on a flange of the E-core.
US10083786B2
An electrical system including multiple bodies having an underlying structure resembling a double helix may be arranged and used, to produce useful electromagnetic effects for various applications, including therapy and the promotion of growth in organisms and organic matter.
US10083785B2
A magnetic sheet 1 of an embodiment includes a stack of a plurality of magnetic thin strips and resin film parts. The stack includes from 5 to 25 pieces of the magnetic thin strips. The magnetic thin strips are provided with cutout portions each having a width of 1 mm or less (including 0 (zero)). A ratio (B/A) of a total length B of the cutout portions provided to the magnetic thin strip to a total outer peripheral length A of an outer peripheral area of the magnetic thin strip arranged on one of the resin film parts is in a range of from 2 to 25.
US10083782B2
The invention relates to a punched part for producing an electrical resistor, in particular a current measuring resistor, comprising a resistor element (9) consisting of a low-resistance resistive material (for example Manganin®) and two electrical connection parts (10, 11) consisting of a conductor material (for example copper), wherein the resistor element (9) is arranged between the two electrical connection parts (10, 11) in the direction of current flow in such a way that the electrical current flows through the resistor element (9). In accordance with the invention, the punched part additionally has a landing area (14) for providing an integrated circuit (16) on the landing area (14) of the punched part. Furthermore, the invention comprises a current sensor comprising such a punched part and a corresponding production method.
US10083769B2
In an electrodeposition treatment of an iron-group metal ion-containing liquid, without being influenced by the properties of the iron-group metal ion-containing liquid, iron-group metal ions are efficiently removed from the liquid by precipitation. An anode chamber 2A provided with an anode 2 and a cathode chamber 3A provided with a cathode 3 are separated from each other by a cation exchange membrane 5, an iron-group metal ion-containing liquid is charged into the anode chamber 2A, a cathode liquid is charged into the cathode chamber 3A, and by applying the voltage between the anode 2 and the cathode 3, iron-group metal ions in the liquid in the anode chamber 2A are moved into the liquid in the cathode chamber 3A through the cation exchange membrane 5, so that an iron-group metal is precipitated on the cathode 3.
US10083765B2
The present method provides for conversion of handwritten to data that is accurate and fast, yet with improved security. The method provides handwritten data split into two or more components and, thus, provided, out of context, for conversion into printed data, and for the secured transmittal of printed data for assembly into context for transmission to the client. The present disclosure also provides for storage of the unassembled data for future use.
US10083759B2
A testing circuit is arranged in a semiconductor integrated circuit so as to detect a delay fault in the semiconductor integrated circuit. The semiconductor integrated circuit includes a first output control circuit having a plurality of sequential circuits, a first combination circuit connected to the first output control circuit, and a memory circuit connected to the first combination circuit. The testing circuit includes the first output control circuit; a second output control circuit; and a third output control circuit. The testing circuit, under control of a testing apparatus connected to the semiconductor integrated circuit, is configured to perform steps to detect the delay fault in the semiconductor integrated circuit.
US10083757B2
A single-poly NVM cell includes a select transistor and a floating gate transistor serially connected to the select transistor. The select transistor includes a select gate, a select gate oxide layer, a source doping region, a first LDD region merged with the source doping region, a commonly-shared doping region, and a second LDD region merged with the commonly-shared doping region. The floating gate transistor includes a floating gate, a floating gate oxide layer, the commonly-shared doping region, a third LDD region merged with the commonly-shared doping region, and a drain doping region. A drain-side extension modified region is disposed under the spacer and in proximity to the drain doping region.
US10083754B1
Multiple reads of memory cells of a flash memory device are initiated at different read levels to obtain raw data. For each different read level, multiple decoding operations are initiated to decode the raw data, each decoding operation using a different one of a plurality of sets of decoding information associated with the different read level. Decoding success rates are determined for one or more of the plurality of sets based on the one or more of the plurality of sets being used to successfully decode data and, for each different read level, an order of the plurality of sets is determined based on the determined success rates. A selected set of decoding information is selected for use in decoding raw data obtained from a read performed at a respective read level based on the respective read level and the set order of the plurality of sets for the respective read level.
US10083749B2
A data storage method applying to a phase change memory and the phase change memory are provided. After obtaining to-be-stored data, the phase change memory (PCM) generates an erase pulse signal and a write pulse signal according to the to-be-stored data. The to-be-stored data is multi-bit data. The write pulse signal includes at least two contiguous pulses. Intervals between the at least two contiguous pulses are the same. The intervals between the at least two contiguous pulses have a value determined according to the to-be-stored data. The PCM applies the erase pulse signal to a storage unit of the PCM to enable the storage unit to change to a crystalline state. Further, the write pulse signal is applied to the storage unit to enable the storage unit to change to an amorphous state corresponding to a first resistance value, where the amorphous state represents the to-be-stored data.
US10083737B2
Detection logic of a memory subsystem obtains a threshold for a memory device that indicates a number of accesses within a time window that causes risk of data corruption on a physically adjacent row. The detection logic obtains the threshold from a register that stores configuration information for the memory device, and can be a register on the memory device itself and/or can be an entry of a configuration storage device of a memory module to which the memory device belongs. The detection logic determines whether a number of accesses to a row of the memory device exceeds the threshold. In response to detecting the number of accesses exceeds the threshold, the detection logic can generate a trigger to cause the memory device to perform a refresh targeted to a physically adjacent victim row.
US10083732B2
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A cell may be written with a value that is intended to convey a different logic state than may typically be associated with the value. For example, a cell that has stored a charge associated with one logic state for a time period may be re-written to store a different charge, and the re-written cell may still be read to have the originally stored logic state. An indicator may be stored in a latch to indicate whether the logic state currently stored by the cell is the intended logic state of the cell. A cell may, for example, be re-written with an opposite value periodically, based on the occurrence of an event, or based on a determination that the cell has stored one value (or charge) for a certain time period.
US10083725B2
The present disclosure includes methods, and circuits, for operating a memory device. One method embodiment for operating a memory device includes controlling data transfer through a memory interface in an asynchronous mode by writing data to the memory device at least partially in response to a write enable signal on a first interface contact, and reading data from the memory device at least partially in response to a read enable signal on a second interface contact. The method further includes controlling data transfer in a synchronous mode by transferring data at least partially in response to a clock signal on the first interface contact, and providing a bidirectional data strobe signal on an interface contact not utilized in the asynchronous mode.
US10083722B2
A memory device includes a memory cell array having a plurality of memory cell groups with a corresponding plurality of independent channels, and the device and an operating method thereof perform an internal data processing operation for the memory cell groups. The memory device includes an internal command generator configured to generate one or more internal commands in order to perform an internal data processing operation in response to a reception of a command, and an internal common bus for a common internal processing channel which is disposed to be shared by the plurality of memory cell groups and configured to form a transmission path of data between the plurality of memory cell groups when the internal data processing operation is performed.
US10083718B1
Motion within first video content and second video content may be assessed. A match between the motions assessed within the first video content and the second video content may be determined. The match may including a first set of video frames within the first video content and a second set of video frames within the second video content within which the matching motion is present. A first video portion (including frame(s) of the first set of video frames) of the first video content and a second video portion (include frame(s) of the second set of video frames) of the second video content may be identified based on the match. The first video portion and the second video portion may be concatenated to provide a transition between the first video portion and the second video portion in which continuity of motion may be achieved.
US10083712B2
A method for manufacturing a magnetic core module in a magnetic head, the magnetic core module and the magnetic head. The method for manufacturing the magnetic core module includes: a process for placing a magnetic core group in a holder mold cavity as an insert; and a process for injection-molding in the holder mold cavity. A method for manufacturing the magnetic core module allows the magnetic core group and the holder to be integrally injection-molded with a method of injection molding which uses the magnetic core group as an insert. The method simplifies the process of manufacturing a magnetic head to improve production efficiency, and saves labor and production costs. Further, the method prevents failures such as positional displacement and scattering of magnetic cores, which tends to occur when assembling thin and small magnetic cores, and ensures an ideal yield for a product.
US10083708B2
A method includes generating a high-band residual signal based on a high-band portion of an audio signal. The method also includes generating a harmonically extended signal at least partially based on a low-band portion of the audio signal. The method further includes determining a mixing factor based on the high-band residual signal, the harmonically extended signal, and modulated noise. The modulated noise is at least partially based on the harmonically extended signal and white noise.
US10083706B2
The coding efficiency of an audio codec using a controllable—switchable or even adjustable—harmonic filter tool is improved by performing the harmonicity-dependent controlling of this tool using a temporal structure measure in addition to a measure of harmonicity in order to control the harmonic filter tool. In particular, the temporal structure of the audio signal is evaluated in a manner which depends on the pitch. This enables to achieve a situation-adapted control of the harmonic filter tool so that in situations where a control made solely based on the measure of harmonicity would decide against or reduce the usage of this tool, although using the harmonic filter tool would, in that situation, increase the coding efficiency, the harmonic filter tool is applied, while in other situations where the harmonic filter tool may be inefficient or even destructive, the control reduces the appliance of the harmonic filter tool appropriately.
US10083701B2
Encoding and decoding devices for encoding the channels of an audio system having at least four channels are disclosed. The decoding device has a first stereo decoding component which subjects a first pair of input channels to a first stereo decoding, and a second stereo decoding component which subjects a second pair of input channels to a second stereo decoding. The results of the first and second stereo decoding components are crosswise coupled to a third and a fourth stereo decoding component which each performs stereo decoding on one channel resulting from the first stereo decoding component, and one channel resulting from the second stereo decoding component.
US10083695B2
A system for biometrically securing business transactions uses speech recognition and voiceprint authentication to biometrically secure a transaction from a variety of client devices in a variety of media. A voiceprint authentication server receives a request from a third party requestor to authenticate a previously enrolled end user of a client device. A signature collection applet presents the user a randomly generated signature string, prompting the user to speak the string, and recording the user's as he speaks. After transmittal to the authentication server, the signature string is recognized using voice recognition software, and compared with a stored voiceprint, using voiceprint authentication software. An authentication result is reported to both user and requestor. Voiceprints are stored in a repository along with the associated user data. Enrollment is by way of a separate enrollment applet, wherein the end user provides user information and records a voiceprint, which is subsequently stored.
US10083692B2
The specification discloses a method of generating and recognizing voice based playback information, and a recording medium for storing instructions for performing the method. That is, a voice playback file for outputting voice is converted to playback information, and the voice is outputted by playing back the voice playback file, when the playback information is recognized. Thus, a recording function, which can be utilized in various fields, can be provided without using a separate storage for storing the voice playback file.
US10083691B2
A computer-implemented system and method for transcription error reduction is provided. A transcribed value and a confidence score are assigned to each utterance in a stream of audio data. Those utterances with confidence scores that fall below a confidence threshold are identified as questionable utterances. At least one of the questionable utterances is placed into a pool of related utterances also determined to be questionable. A determination is made as to whether the pool satisfies a size threshold within a predetermined amount of time. A sample of the questionable utterances from the pool is obtained when the pool satisfies the size threshold within the predetermined amount of time. The sample of questionable utterances is provided to at least one human transcriber for verification.
US10083687B2
Disclosed are systems, methods, and computer readable media for identifying an acoustic environment of a caller. The method embodiment comprises analyzing acoustic features of a received audio signal from a caller, receiving meta-data information based on a previously recorded time and speed of the caller, classifying a background environment of the caller based on the analyzed acoustic features and the meta-data, selecting an acoustic model matched to the classified background environment from a plurality of acoustic models, and performing speech recognition as the received audio signal using the selected acoustic model.
US10083684B2
An approach is provided that assists visually impaired users. The approach analyzes a document that is being utilized by the visually impaired user. The analysis derives a sensitivity of the document. A vocal characteristic corresponding to the derived sensitivity is retrieved. Text from the document is audibly read to the visually impaired user with a text to speech process that utilizes the retrieved vocal characteristic. The retrieved vocal characteristic conveys the derived sensitivity of the document to the visually impaired user.
US10083683B2
A noise source emits an acoustic noise wave with a noise frequency corresponding to an attribute of a control-status signal associated with the noise source. A method to reduce the noise comprises generating, based on the noise frequency corresponding to the attribute, an anti-noise signal having the noise frequency. The method further comprises phase-shifting the anti-noise signal to output a phase-shifted anti-noise signal that can be used to generate a noise-cancelling acoustic wave. The method can include aligning the first anti-noise signal to be in-phase with the acoustic noise wave. An anti-noise apparatus to implement the method includes an anti-noise generator, to generate the anti-noise signal, and a phase shifter to generate and output the phase-shifted anti-noise signal. The anti-noise apparatus can include a phase detector and phase alignment element to align the anti-noise signal to be in-phase with the acoustic noise wave.
US10083667B2
An active matrix substrate includes a plurality of signal lines, each of which includes first and second line portions and an inner connection portion (connection portion) that connects the first and second line portions. The first and second line portions of one of two adjacent signal lines are made of first and second conductive layers, respectively, and the first and second line portions of the other of the two adjacent signal lines are made of second and first conductive layers, respectively. The position of the connection portion of each of the signal lines is determined in accordance with the layout position of that signal line in the line region.
US10083664B1
A thin film transistor (TFT) array substrate and a display panel are provided. The TFT array substrate includes multiple pixels arranged in an array. Each pixel includes first through third sub-pixels sequentially arranged along a first direction. The first through third sub-pixels are connected to a same scan line. The TFT array substrate further includes first through third data lines sequentially arranged along the first direction. The first through third data lines respectively are for driving the first through third sub-pixels. The first sub-pixel includes first and second areas, the second sub-pixel includes third and fourth areas, and the third sub-pixel includes fifth and sixth areas, arranged along a second direction. A voltage difference between a sub-pixel electrode in the sixth area and a common electrode is different from a voltage difference between a sub-pixel electrode in the fifth area and the common electrode.
US10083659B2
The present application discloses an organic light emitting display panel, a driving method thereof and an organic light emitting display apparatus. The organic light emitting display panel comprises: a pixel array, comprising pixel regions in M rows and N columns; a plurality of pixel driving circuits each comprising a light emitting diode and a driving transistor for driving the light emitting diode, the light emitting diode being arranged in one of the pixel regions; and a plurality of pixel compensation circuits, each configured to provide a compensated light emitting control signal for a gate of the driving transistor to correct brightness of the light emitting diode in one of the plurality of pixel driving circuits. According to the present disclosure, the final light emitting current may be unrelated to the threshold voltage of the driving transistor, the carrier mobility and aging of the light emitting diode.
US10083655B2
A pixel includes: a first transistor connected between a data line and a first node; a second transistor connected between a first power source and a second node, the second transistor including a gate electrode connected to the first node; a third transistor connected between the first node and a third power source; a fourth transistor connected between the second node and an fourth power source; a capacitor connected between the first node and the second node; and an organic light-emitting diode (OLED) connected between the second node and a second power source.
US10083644B2
A display panel control system and a display device are disclosed. The control system includes a system chip is configured for receiving video signals and for analyzing the video signals to obtain driving signals and timing signals, and a driving control board is configured for receiving the driving signals and the timing signals, and for controlling a display panel to display in accordance with the driving signals and the timing signals. The control system integrates the function of obtaining the driving signals and the timing signals on the system chip so as to simplify the structure of the display panel control system and to reduce the manufacturing cost.
US10083642B2
A display apparatus including a display panel and a display driver is provided. The display panel includes a sub-pixel repeat array. The sub-pixel repeat array is repeatedly arranged to form a pixel array on the display panel. The pixel array includes at least one map display unit. The display driver is coupled to the display panel. The display driver drives the display panel to display an image by using a sub-pixel rendering method. The image includes at least one specified intensity map. The map display unit includes a center sub-pixel unit and a plurality of neighboring sub-pixel units. The specified intensity map includes one or more white pixel points. In the map display unit, luminance summations of sub-pixels of different colors are equal. Furthermore, a display driving method is also provided.
US10083628B2
Embodiments disclosed herein describe systems and methods for a tactile braille display that reduces the number of actuators used to position movable pins. In embodiments, the actuators may be configured to move a plurality of movable pins at different times while also being configured to move independent movable pins.
US10083624B2
An example method includes outputting a graphical dashboard that includes one or more learning objective nodes and one or more skill nodes, selecting one or more software agents that are associated with the one or more skill nodes, providing, to at least one host computing system, an indication of the one or more software agents that are configured to collect parameter data from the at least one host computing system while a trainee performs actions, receiving the parameter data collected by the one or more software agents during execution, determining, based on the parameter data, that the one or more skills represented by the one or more skill nodes have been demonstrated by the trainee, and updating the one or more skill nodes to graphically indicate that one or more represented skills have been demonstrated.
US10083619B2
A system for enabling real time live proctoring of an exam across a distributed network includes a first remote computer. The first remote computer is capable of real time audio visual capture and display of an image of a user of the first remote computer. A second remote computer is capable of real time audio visual capture and display of an image of the user of the second remote computer. A server is in communication with the first remote computer and the second remote computer, and provides an interactive web based scheduling portal accessible from the first remote computer and the second remote computer. A database is associated with the server for storing data regarding the rules for proctoring of an exam including the rate at which an exam may be proctored at a given date and time. The server enables access to a virtual exam room by the first remote computer and the second remote computer in response to a request from the first remote computer through the scheduling portal for a date and time to take an exam administered at the first computer when the requested date and time fulfills the rules stored in the database.
US10083613B2
A method of calculating a commonly driven velocity recommendation, comprising: gathering a plurality of data messages from a plurality of client devices located in a plurality of different vehicles, each data message comprises a current location value, a current bearing value, and a current velocity value estimated for a hosting vehicle; clustering the plurality of data messages in a plurality of clusters by matching the respective location values and bearing values; calculating a commonly driven velocity per cluster of the plurality of clusters by combining data from respective cluster members; and retrieving the commonly driven velocity in response to an indication of a current location and a current bearing thereof which matches location and bearing of members of the respective cluster.
US10083612B2
Provided is a display device for a vehicle. The display device includes a display member and a collision predictor. The collision predictor detects one or more moving bodies on and around a course of the vehicle, and predicts collision of the vehicle with the one or more moving bodies detected, and a position of the collision. The display member displays a collision-position mark at a display position in a visual field of a driver, on a condition that the collision of the vehicle with any one of the one or more moving bodies is predictable. The display position is superimposed on the predicted position of the collision. The display member displays a delineator mark that associates the collision-position mark with the relevant one of the one or more moving bodies detected.
US10083611B2
A method system and social platform for distributing parking location information via the social platform to community members of the social platform to enable community members to acquire a parking spot, wherein a community of street parking motorists who alternately need or have parking spot information is created, community members simultaneously broadcast parking spot information (Beacons) and parking spot requests, where a single motorist who will soon be relinquishing his/her spot is matched to another motorist within a target radius who has requested a parking spot, and where a community member can monitor a dashboard that reflects real time matchmaking activity based on several factors including tier association, spot/profile alignment and queue entry order such that participating members can equitably and efficiently disseminate parking location information in a timely manner.
US10083607B2
A safety system determines a correspondence between a vehicle and an upcoming traffic signal, and predicts a state of the traffic signal when the vehicle is expected to reach the signal's location. Based on proximity to the signal and speed of the vehicle, the system provides a warning if it determines that the vehicle is likely to proceed contrary to the signal (e.g., a driver is likely to run a red light). The warning is issued to the vehicle about to illegally enter the intersection, to other nearby vehicles and pedestrians, and to the traffic signal itself.
US10083604B2
Systems of an electrical vehicle and the operations thereof are provided that forms ad hoc autonomous vehicle networks to conserve bandwidth in receiving information from a remote source and sending information to the remote source.
US10083600B1
A mobile computing device that is configured to wirelessly transmit audio data to an audio sink device. The mobile computing device has a wired audio input connector that is constructed and arranged to accept input audio data from an audio data source that is directly electrically coupled to the wired audio input connector. The mobile computing device includes circuitry that is configured to route the input audio data to the audio sink by wireless transmission. When input audio data is available from the audio input connector, the circuitry is configured to determine whether to route the audio input data to the audio sink device.
US10083597B2
A personally installable home emergency alert system, for alerting aid responders and to guide them to a residence where an individual has suffered a personal incident, and having a bulb having a globe portion containing a plurality of low voltage response lights, a base portion attached to the globe containing a plurality of response circuits and connectable to a domestic conventional power supply and adapted to activate the response lights, fastening means on the base portion whereby it is adapted to be received in a conventional domestic electrical lamp receptacle, and, a radio frequency remote controller adapted to communicate with the response circuits in the base portion operable to activate the low voltage response lights.
US10083596B2
Systems and methods of security are provided, including at least one of a plurality of sensors to detect a location of at least one user, and generate detection data according to the detected location of the at least one user. A processor may be communicatively coupled to the at least one of the plurality of sensors to receive the detection data and to determine whether the at least one user is occupying a building according to the detection data. An alarm device, communicatively coupled to the processor, can be armed or disarmed by the processor according to the determination as to whether the at least one user is occupying the building.
US10083595B2
A system for alerting a user of a device departing a vehicle includes a software application configured to be executed on a memory of the device. The software application performs an initial query phase to periodically query the status of a data connection between the device and the vehicle. Upon confirmation that a data connection has been established, the software application engages an armed state and periodically queries for a failure of the data connection between the device and the vehicle. Upon detecting a failure of the data connection the software application engages an alert state operative to alert a user upon failure of said data connection between the device and the vehicle.
US10083589B2
The monitoring of protective glasses in laser machining heads, which are exposed to dust, sputtering and/or soiling, with the aim of predicting the contamination of the protective glass by way of determination of its absorption rate by means of temperature monitoring. The absorption rate is determined during laser processing by using a time-resolved temperature profile of the protective glass. Either, a difference of temporal temperature gradients being present before and after switching the working laser or an amplitude arising in a frequency spectrum of the temperature profile at the switching frequency of the laser is evaluated. Upon exceeding predetermined threshold values warning and error signals, respectively, are triggered.
US10083588B1
A method of notifying a driver of a fault associated with a vehicle system is disclosed. The method includes receiving one or more fault signals from a vehicle system. Each fault signal includes a fault source, a fault time, and a fault description. The method includes determining a fault value associated with the received one or more fault signals. The fault value associated with a period of time or a number of events from an initial received fault signal. The method also includes executing on the computing processor a behavior system. The behavior system receives the fault signal and executes one or more behaviors from a first level of behaviors in response to the fault value being less than a first threshold value, and one or more behaviors from a second level of behaviors in response to the fault value being greater than the first threshold value.
US10083577B2
Sensor systems, methods and machine readable medium are provided for a sensor system for analyzing the ripeness of produce items.
US10083574B2
Some embodiments may include a poker indexing service. For example, a multi dimensional vector of player performance and/or other data may be determined based on gaming related activity that is input or otherwise captured. Such a vector may be used in various forms to generate a metric or to facilitate wagering and/or other gaming activity. Other methods and apparatus are described.
US10083569B2
A gaming machine comprises: a gaming machine body; a recessed portion formed on the gaming machine body, being recessed from a front side to a back side of the gaming machine body, and having an inner side surface, the inner side surface being a reflective surface; and a reflective object at least partially positioned in a space defined by the recessed portion, and formed with a reflected image by means of the reflective surface.
US10083562B2
A paper sheet recognition apparatus (1) that recognizes a paper sheet based on an optical spectrum acquired from the paper sheet includes, a light source unit (31) including light sources arranged corresponding to partial areas on the paper sheet, a reading unit (32) having a light receiving surface to receive reflected lights from the partial areas, a sensor unit (34) that acquires an optical spectrum of light received by the light receiving surface, a memory (80) that stores an optical spectrum measurement condition, and a light-source control unit (72) that controls the light source unit (31) based on the optical spectrum measurement condition. The optical spectrum measurement condition includes information for identifying at least one light source corresponding to the predetermined partial area, information for identifying a timing for turning on the identified light source, and information for identifying a timing for turning off the light source.
US10083553B2
An exemplary reporting method includes the steps of receiving diagnostic data from electric vehicle supply equipment, and then reporting the diagnostic data through an interface of an electrified vehicle. An exemplary electrified vehicle assembly includes a controller of an electrified vehicle. The controller is configured to receive diagnostic data from electric vehicle supply equipment. The exemplary assembly further includes an interface of the electrified vehicle configured to report the diagnostic data.
US10083550B1
Systems and methods are disclosed for determining whether or not a crash involving a vehicle has occurred. The acceleration of the vehicle may be measured using, for example, an accelerometer of a mobile device, which may be located inside the vehicle. The system may determine the magnitude of each accelerometer measurement and whether the magnitude exceeds one or more acceleration magnitude thresholds. The system may also determine the number of accelerometer events within a time window and whether the number exceeds one or more count thresholds. The system may determine whether a crash involving the vehicle has occurred based on the magnitudes of acceleration, number of acceleration events, and various thresholds. In some examples, the system may confirm that a crash has occurred based on, for example, the location of the mobile device.
US10083546B2
An augmented reality information displaying device according to the embodiment includes a storage, a display-position deciding unit, and a display controller. The storage stores augmented reality information associated with a real position. The display-position deciding unit decides a display position of the augmented reality information on a display screen of a transmission-type display device based on a real position of a user that visually recognizes the display screen, a real position of the display screen, the real position in the scene through the display screen associated with the augmented reality information. The display controller controls to display, at a display position decided by the display-position deciding unit, the augmented reality information corresponding to a mode according to positional relationship between the real position of the user and the real position associated with the augmented reality information in the scene.
US10083544B2
A system for tracking a first electronic device, such as a handheld smartphone, in a virtual reality environment generated by a second electronic device, such as a head mounted display may include detection, by a camera included in one of the first electronic device or the second electronic device, of at least one visual marker included on the other of the first electronic device or the second electronic device. Features detected within the field of view corresponding to known features of the visual markers may be used to locate and track movement of the first electronic device relative to the second electronic device, so that movement of the second electronic device may be translated into an interaction in a virtual experience generated by the second electronic device.
US10083542B1
Polyhedral data is compared with limited information while keeping accuracy. A comparison of two polyhedrons is accomplished as follows. (1) A squared-sum of the difference of primary moment functions and a squared-sum of the difference of secondary moment functions are separately sought at sample points of polyhedron Ma, Mb, normalize them and compute the sum of both, or seek sum functions of the primary moment functions and the secondary moment functions to compute the squared-sum of the difference of the sum functions, the primary moment function all the sample points of polyhedral data that occupy central symmetry directions are blended in the same sign, which is the different sign in the case of the secondary moment function, the functions having variables representing points on a surface of a sphere of which center is the center of gravity of the polyhedron and a value which is an axial moment value, the axis defined as a line through the points and the center, and (2) in the case that the value of the sum is a certain threshold or less, it is determined that the polyhedrons are similar in shape.
US10083539B2
In a control system for navigating in a virtual reality environment, a user may select a virtual feature in the virtual environment, and set an anchor point on the selected feature. The user may then move, or adjust position, relative to the feature, and/or move and/or scale the feature in the virtual environment, maintaining the portions of the feature at the set anchor point within the user's field of view of the virtual environment.
US10083529B2
A reduction method for a boundary artifact on the tomosynthesis includes steps of performing a projection process, performing a back projection process upon the geometric factor matrix so as to obtain a back-projection geometric factor matrix, and adjusting a boundary area of the back-projection geometric factor matrix.
US10083527B2
An image data processor (106) includes a structural image data processor (114) that employs a multi-structure atlas to segment a region of interest from structural image data that includes tissue of interest and that segments the tissue of interests from the region of interest. The image data processor further includes functional image data processor (116) that identifies the tissue of interest in functional image data based on the segmented tissue of interest. An image data processor includes a multi-structure atlas generator (104) that generates a multi-structure atlas. The multi-structure atlas physically maps structure to tissue of interest such that locate the structure in structural image data based on the multi-structure atlas localizes the tissue of interest to the region of interest.
US10083522B2
A Quantified Image Measurement System that creates accurate physical measurement data from digital pictures is disclosed. The system can use any image format and enhances the image file with measurement data and data transformation information that enables the creation of any type of geometrical or dimensional measurement from the stored photograph. This file containing the original digital image along with the supplemental data is referred to as a Quantified Image File or QIF. The QIF can be shared with other systems via email, cloud syncing or other types of sharing technology. Once shared, existing systems such as CAD applications or web/cloud servers can use the QIF and the associated QIF processing software routines to extract physical measurement data and use the data for subsequent processing or building geometrically accurate models of the objects or scene in the image. Additionally smart phones and other portable devices can use the QIF to make measurements on the spot or share between portable devices. In addition, the quantified image measurement system of this invention eliminates the need for capturing the image from any particular viewpoint by using multiple reference points and software algorithms to correct for any off-angle distortions.
US10083520B2
The radiographic image generation method includes acquiring a plurality of radiographic images corresponding to a number of radiation dose portions by emitting radiation to an object by dividing a radiation exposure dose into the radiation dose portions, and by detecting the emitted radiation, and matching the plurality of acquired radiographic images, by shifting all or a portion of data of a plurality of the acquired radiographic images such that the corresponding articles within a plurality of the acquired radiographic images are positioned at a same relative position in each of the acquired radiographic images.
US10083507B2
In the context of a method for the analysis of image data representing a three-dimensional volume of biological tissue, the image data comprises a first image representing the volume at a first point in time and a second image representing the volume at a second point in time being different from the first point in time. The method comprises the steps of: a) identifying a first subvolume of the volume represented by the first image having a major extension in a predefined direction and a second subvolume of the volume represented by the second image having a major extension in the predefined direction, whereas the first subvolume and the second subvolume represent a same region of the three-dimensional volume; b) creating a distance matrix from image data of a succession of voxels of the first subvolume in the predefined direction and image data of a succession of voxels of the second subvolume in the predefined direction; and c) analyzing the distance matrix to obtain at least one local measure for a probability of growth of a layer of the biological tissue represented by the first and the second subvolume, along the predefined direction.
US10083491B2
A system to provide feedback for energy saving to a user of a property comprising a plurality of appliances, the system comprising: at least one sensor monitoring energy consumption of one or more appliances within the property; a user interface to provide feedback to the user; and a processor configured to receive input data from an energy bill for the property covering a predetermined period; receive input regional average statistics regarding energy consumption for a set of predetermined categories of energy usage; generate a model of energy usage within a plurality of categories over the predetermined period by combining the input data, energy consumption data from the at least one sensor and generic statistics regarding energy consumption and output, via the user interface, feedback to the user based on the generated model.
US10083490B2
Disclosed is a system, method, and computer program product for implementing a marketing automation tool that provides an improved approach for an integrated and/or customized workspace for a social relationship management system. The present invention provides a mechanism to allow the user of a SRM system to configure a workspace for the SRM product, to choose the specific functionality from the SRM suite to be displayed and executed for the user and to post a message while simultaneously viewing the workspace.
US10083487B1
A system quantifies the extent of a damaged vehicle in the absence of a specialist (appraiser) present onsite. The system enables an objective estimate of the damage, supplanting or merely supplementing psychologically biased claimant reporting. The system has hardware structures to perform imagery quantification of damage on a damaged vehicle. The damaged vehicle may be located anywhere, including at the scene of an accident, at an insured's home, at an insurer's claims offices, or at a body shop. Anyone, including the insured, with a mobile device such as a smart phone, may download onto it a mobile application that guides the user to take photographs or moving images of the damaged vehicle for the system to perform imagery quantification of damage.
US10083481B2
A method for treating information technology (IT) risk of an organization including identifying a plurality of IT risks, where each of the plurality of IT risks is based on a known problem and is associated with an IT asset classification and an IT consequence classification, calculating a plurality of IT risk exposure indices, where each of the plurality of IT risk exposure indices is associated with at least one of the plurality of IT risks, adjusting each of the plurality of IT risk exposure indices based on a business impact factor to obtain a business impact index, prioritizing the plurality of IT risks by adjusting the business impact index based on a risk treatment factor to obtain a prioritized risk treatment index, and selecting at least one of the plurality of IT risks for treatment based upon the prioritized risk treatment index.
US10083476B2
A system gathers user behavior data from a group of web retailers and/or non-web retailers, analyzes the user behavior data to identify product recommendations for products offered by the web retailers, and provides one of the identified product recommendations in connection with a product page associated with one of the web retailers.
US10083473B2
Various embodiments are included for adjusting a search result user interface when a foreign language search query is detected. A search query associated with a search request is obtained. A language of the search query is identified. Search results are obtained from a site corresponding to the language. Additionally, a translation of the search query is obtained if allowed for a corresponding product category.
US10083465B2
When an online system receives a request to present content items to a user, a content selection system included in the online system selects content items for presentation to the user during a latency period from the time the request was received until the time when the content items are sent. A feedback control mechanism communicates with each computing device of the content selection system to determine the latency period of each computing device. The feedback control mechanism also determines a target latency period in which content items are selected. By comparing the latency period of each computing device to the target latency period, an amount of information to be evaluated by each computing device is determined based on whether a computing device's latency period is greater than or less than the target latency period.
US10083457B2
A system that incorporates teachings of the present disclosure may include, for example, a media processor having a controller to solicit an appraisal for each of a plurality of media programs presented by the media processor for composing a proposal to update one or more operational features of the media processor according to one or more consumer preferences determined from one or more supplied appraisals. Other embodiments are disclosed.
US10083449B2
A network device sends, to a customer device, real-time customer data for a service campaign running on a service provider network. The network device receives a customer authorization to share the customer data with an agent of the service provider network. The customer authorization includes session context information related to the presentation of the customer data. The network device determines if there are predictive options for the customer data. When there are no predictive options for the real-time customer data, the network device sends, to the customer device, a first feed of the real-time customer data and sends, to the agent device, the session context information and a second feed of the real-time customer data. The session context information enables the agent device to build an instance of the customer data that is similar to a presentation on the customer device, without sharing the customer screen view.
US10083443B1
A system and method for maintaining authentication of a user of a wearable device. The wearable device can include an electrical circuit, an accelerometer, a capacitive sensor, or other wearable detection module that can determine that the wearable device has been in continuous contact with, or continuous use by, the wearer. A first payment transaction can be initiated between the wearable device and a first payment terminal. A user credential is then received at either the wearable device or a mobile device coupled to the wearable device. The user credential is verified and the first payment transaction is authorized. A second payment transaction is then initiated between the wearable device and a second payment terminal. If the wearable device is determined to have been in continuous use by the user, then the second payment transaction can be completed without requiring re-authentication of the user.
US10083442B1
Several embodiments include a mobile device that uses a media file to render a passcode entry interface. The passcode entry interface can have an assigned location of an input element that corresponds to an inputtable value in the passcode entry interface. The media file can include a visual depiction having the input element at the assigned location. In several embodiments, the media file does not store the association between the assigned location and the inputtable value. The assigned location corresponding to the inputtable value can be separately stored. The mobile device can receive a coordinate of a touch event on the passcode entry interface. To determine a passcode entry based on the touch event, the coordinate can be compared against the separately stored assigned location to determine a corresponding input value to the coordinate.
US10083436B1
A system for processing payments from a customer to a merchant uses a merchant POS system associated with the merchant, a customer mobile device, and a payment server. The payment server generates a Transaction ID unique to a payment transaction. The customer mobile device validates the payment transaction in response to the Transaction ID. The payment server generates a payment notice when the customer mobile device validates the payment transaction. In one case, the merchant POS system presents the Transaction ID to the customer mobile device in preparation for the payment transaction.
US10083435B2
To facilitate conducting a secure transaction via wireless communication between a portable electronic device (such as a smartphone) and another electronic device (such as a point-of-sale terminal), the portable electronic device may, after a final command is received from the other electronic device, determine a unique transaction identifier for the secure transaction. In particular, the final command may be specific to an applet, stored in a secure element in the portable electronic device, which conducts the secure transaction. The secure element may generate the unique transaction identifier based on financial-account information associated with the applet, which is communicated to the other electronic device. Next, the secure element may provide, to a processor in the portable electronic device, an end message for the secure transaction with the unique transaction identifier.
US10083434B2
A method for conducting a transaction is disclosed. The method includes using a first portable electronic device, and directly transmitting a request for payment to a second portable electronic device through a wireless link. Then, the second portable electronic device transmits an approval of the request for payment to the first portable electronic device. One of the first and the second portable electronic devices then sends the request for payment to a payment hub service. The payment hub service then facilitates the transfer of funds from a payer institution to a payee institution to complete the transaction.
US10083433B2
Embodiments of the disclosure relate to systems and methods for managing accounts associated with a proxy. In one embodiment, a method can include receiving a merchant ID associated with a merchant from either a user interface or a point of sale device associated with the merchant. The method can include receiving proxy information associated with a proxy from either the user interface or the point of sale device associated with the merchant. Further, the method can include determining a payment account associated with both the merchant and the proxy, based at least in part on the merchant ID or the proxy information, the payment account having a balance and selected from an account database. The method can include transmitting payment information associated with the payment account to either the user interface or the point of sale device, based at least in part on the merchant ID or the proxy information.
US10083428B1
Identification information is received from a transaction card at a transaction machine. The transaction card is associated with an account holder using the transaction machine and includes a transaction card type. Using the identification information, activity profile information is accessed for the account holder. The account holder's transaction machine usage is monitored and activity profile information related to the account holder's transaction machine usage is stored. A custom sequence of user interfaces to be displayed to the account holder is generated based on the transaction card type.
US10083425B2
A secure payment system between a customer and a merchant, where the sales terminal wirelessly transmits a partial payment authorization transaction record including, at least a merchant terminal identification and a payment amount, but not a customer bankcard data, for a specific sales transaction, to a wireless device of the customer. Alternatively, the sales terminal displays a partial payment authorization transaction record including, at least a merchant terminal identification and a payment amount, but not a customer bankcard data, for a specific sales transaction, for the displayed record to be captured by a wireless device of the customer.
US10083420B2
According to one aspect, an approach is provided that assists in presenting the right information within the ecosystem. The approach involves associating information sources (ads, sponsored information, research requests, debate notices, seminars, education opportunities, peer generated information, etc) with a feedback mechanism. In one embodiment, the feedback mechanism includes a scoring feature, where individual participants within the ecosystem rate the relevancy and/or importance of the information provided. In one example, a user is notified that a potentially relevant information source is available. The notification is typically displayed unobtrusively within a browser or interface window that the user is navigating. In one implementation, the user must perform some affirmative action to reach information associated with the information opportunity. In one example, requiring an affirmative action serves as a shield from pop-ups, banner-ads, and other distracting form of advertising. It is also realized that allowing the user to select the information opportunity rather than display it immediately permits the user to decide explore the opportunity. In one example, permitting the user to decide to explore the opportunity increases the user's receptivity to the information opportunity. In one embodiment, information associated with the information opportunity is displayed in response to user selection. The information associated with the information opportunity describes the information opportunity available. The user is provided with the opportunity to evaluate the information opportunity without being required to visit it and/or review it in its entirety. The information associated with the information opportunity may also be displayed with user feedback.
US10083419B2
A barcode scanner device 200 is formed as a wrist watch with a main body 210 and strap 220 and includes a camera 211 to capture an image of a barcode 11. The scanner 200 generates an inventory request message sent by a communication interface 215 to a local server 30 based on the captured barcode. In a capture mode, live camera images may be displayed on touch-screen display 212 while capturing the barcode with guides and feedback for the user. In a display mode, inventory data from database 32 may be accessed in a large data field on the touch screen display 212.
US10083417B2
Stock management for electronic transactions includes receiving an indication that an item of stock has been selected to be purchased by a purchaser. Stock management for electronic transactions also includes obtaining information relating to the purchaser, and determining whether to remove the item from stock based on the obtained information.
US10083416B2
Embodiments of the present routing returned inventory assets and provide a method, system and computer program product for routing items in a manufacturing environment. In an embodiment of the invention, a method for routing items in a manufacturing environment can be provided. The method can include defining attributes of work pools in the manufacturing environment, defining a set of reuse strategies for use in the manufacturing environment, receiving a returned inventory asset in the manufacturing environment and obtaining at least one attribute of the returned inventory asset, comparing the obtained at least one attribute of the returned inventory asset to the set of reuse strategies to select the reuse strategy to apply to the returned inventory asset and applying the selected reuse strategy to the returned inventory asset to assign the returned inventory asset to one of the work pools in the manufacturing environment. The method can further include the transportation of the returned inventory asset to a temporary location other than the assigned work pool, and can include updating a returned inventory asset tracking record to indicate the assigned work pool.
US10083402B2
A method for presenting search query results is provided. The method may include detecting an occurrence of the trigger event. The method may include determining a category of information based on data associated with the trigger event. The method may include identifying at least one constraint based on the determined category of information. The method may include appending to the identified at least one constraint to the determined category of information. The method may include generating at least one search query. The method may include selecting at least one candidate website based on the category of information. The method may include performing the at least one search query on the at least one candidate website. The method may include filtering each search query result within the search query results. The method may include sending each filtered search query result within the search query results to a user.
US10083400B2
A system and method for predicting, proposing and/or evaluating suitable medication dosing regimens for a specific individual as a function of individual-specific characteristics and observed responses of the specific individual. Mathematical models of observed patient responses are used in determining an initial dose. The system and method use the patient's observed response to the initial dose to refine the model for use to forecast expected responses to proposed dosing regimens more accurately for a specific patient. More specifically, the system and method uses Bayesian averaging, Bayesian updating and Bayesian forecasting techniques to develop patient-specific dosing regimens as a function of not only generic mathematical models and patient-specific characteristics accounted for in the models as covariate patient factors, but also observed patient-specific responses that are not accounted for within the models themselves, and that reflect variability that distinguishes the specific patient from the typical patient reflected by the model.
US10083397B2
A method for personalized intelligent wake-up system based on multimodal deep neural network comprises monitoring a sleeping status of a user; obtaining a current sleeping-stage of the user within a current time frame and a prediction of a next sleeping-stage of the user for a next time frame; correcting the current sleeping-stage of the user through combining the current sleeping-stage and the prediction of the next sleeping-stage; determining a wake up strategy for the current time frame; determining a relationship between each of a plurality of alarm impulses adopted to wake up the user and a corresponding reaction of the user; identifying a change in the current sleeping-stage for the current time frame; determining an alarm impulse to be triggered for waking up the user; and triggering the determined alarm impulse.
US10083391B2
A badge of the type comprising a substrate with a top side and a bottom side, an adhesive disposed on the bottom side for adhering the badge to a person, and a visually discernible material disposed on the top side for providing information, has a wireless device carrying first information secured directly or indirectly to said substrate. The visually discernible material comprises a first portion of visually discernible material and a second portion of visually discernible material. The first portion of visually discernible material is positioned, configured and dimensioned to communicate humanly perceptible and humanly readable second information. The second portion of visually discernible material carries third information encoded within the second portion of the visually discernible material and is positioned, configured and dimensioned to be scanned by an optical device in order to the read said third information encoded within the second portion of the visually discernible material. The substrate and/or said wireless device is frangible.
US10083385B2
An account is managed using information read from a dual frequency transponder. Information stored on the dual frequency transponder can be read by a NFC-enabled device and by a UHF RFID reader. The information links, corresponds, or otherwise provides access to account information stored at a remote server. For example, a NFC-enabled device can read the information from the dual frequency transponder and use that information to enable instant and on-the-spot recharging of a toll account. In addition, a UHF RFID toll reader can scan information from the dual frequency transponder and use that information to debit toll charges from the correct toll account. The dual frequency transponder can be embedded in a license plate and read using a reader placed in the road. Additionally, the transponder can be configured to function at the correct frequency only when a valid vehicle registration sticker is applied to the license plate.
US10083382B2
An image forming apparatus capable of flexibly controlling whether or not to perform user authentication when a user performs operations related to functions of the apparatus. When a user instructs the apparatus to perform any of operations related to a secure print job which is a print job executed by using a secure print function, when the apparatus is operated in a function-based authentication mode, it is determined whether or not a user-selected function of a plurality of functions including at least a secure printing function for printing data in response to an input of a password requires user authentication. When the secure printing function is specified as the user-selected function and it is determined that the user-selected function does not require user authentication, the user is allowed to use the secure printing function, even if the user is not authenticated.
US10083381B2
A remote override system may comprise a remote device and a local device. The remote device may include a remote device computer having a remote device processor and a remote device communication interface, and an outgoing override signal handler capable of sending an override signal by way of the remote device communication interface. The local device may include a local device computer having a local device processor and a local device communication interface, and an incoming override signal handler capable of receiving the override signal by way of the local device communication interface. The override signal may be capable of causing override of a power saving mode at the local device.
US10083380B2
A calculating unit calculates, as a reference number N of scans, a sum by adding 1 to a product M of the number m of scans in a main-scanning direction and the number n of scans in a sub-scanning direction. An assigning unit assigns, as a count of scans indicating a scan order, an integer 1 or more and the product M or more to each pixel of a unit image. A changing unit changes the count of scans of some pixels to which a first scan is assigned to an N-th scan. The generating unit generates print data, in which nozzle groups from a nozzle group arranged on a downstream end in the sub-scanning direction to a nozzle group arranged on an upstream end are sequentially assigned to pixels from the pixels to which the first scan is assigned to the pixels to which the N-th scan is assigned.
US10083378B2
A machine learning model is configured to detect objects from video images. A system monitors video images to identify particular objects. A deep learning process is utilized to learn a baseline pattern. A change due to movement within a field of view is autonomously detected using the deep learning processing. An action is performed based on the detected change.
US10083377B2
A sensing method for a counterfeit bill detector includes (i) using multiple image-sensing modules to scan multiple pieces of image information of a bill and converting the multiple pieces of image information into multiple values of digital image, (ii) comparing each value of digital image with a pre-stored image threshold value to generate a reference value, (iii) adding the multiple reference values to generate an image validation value, (iv) comparing the image validation value with a pre-stored validation threshold value to acquire a comparison result, and (v) determining if the multiple pieces of image information are valid according to the comparison result. The sensing method tackles the issue of unsynchronized actions in bill sensing and bill scanning and simultaneously eliminates the problem of distorted scanned bill image arising from entry of misaligned bill to improve accuracy in bill validation.
US10083375B1
A method for configuring a CNN with learned parameters that performs activation operation of an activation module and convolution operation of one or more convolutional layer in a convolutional layer at the same time is provided. The method includes steps of: (a) allowing a comparator to compare an input value corresponding to each of pixel values of an input image as a test image with a predetermined reference value and then output a comparison result; (b) allowing a selector to output a specific parameter corresponding to the comparison result among multiple parameters of the convolutional layer; and (c) allowing a multiplier to output a multiplication value calculated by multiplying the specific parameter by the input value and allowing the multiplication value to be determined as a result value acquired by applying the convolutional layer to an output of the activation module.
US10083369B2
A system and method that identifies an object and a viewpoint from an image with a probability that satisfies a predefined criterion is described. An active view planning application receives a first image, performs recognition on the first image to determine an object, a viewpoint and a probability of recognition, determines a first expected gain in the probability of recognition when a first action is taken and a second expected gain in the probability of recognition when a second action is taken, and identifies a next action from the first action and the second action based on an increase in expected gains.
US10083368B2
A method of dynamically updating a feature database that contains features corresponding to a known target object includes providing an image, extracting a first set of features from within the captured image, and comparing the first set of features to the features stored in the feature database. If it is determined that the target object is present in the image then at least one of the extracted features of the first set that are not already included in the feature database are added to the feature database.
US10083360B1
A method for generating time-lapse representation of video footage in a security/automation system is described. In one embodiment, the method may include receiving video from a camera at a location associated with a home automation system, determining a first motion event in the video, identifying a level of priority associated with the first motion event, and generating a time-lapse representation of the video having a first frame rate for a first part of the time-lapse representation of the video and a second frame rate different from the first frame rate for a second part of the time-lapse representation of the video that includes the first motion event. In some cases, the time-lapse representation of the video may be generated based at least in part on the level of priority associated with the first motion event.
US10083358B1
A method and system for associating an image of a face of at least a person with Point-of-Sale (PoS) data by aligning a first event time series with a second event time series based on a dynamic time disparity. An exemplary embodiment can generate an event time series containing facial recognition data for a person or persons during the PoS transaction process. These data can form a vision-based checkout event time series. An embodiment can also collect PoS transaction data from the retail checkout system, using timestamp information to create a second event time series. As there may be a time disparity between the time series, they can then be aligned in order to match events from one time series to the other. Faces identified in checkout events in the first time series can be registered to PoS events and the results stored in a database.
US10083357B2
Systems and methods are provided for augmenting or annotating image data to help a user locate an item among a number of items in a physical environment. The systems disclosed herein can access an image of a location that includes a number of items. The systems may then identify the items and the location of the items within the image. Further, the systems may create an interactive alternative visualization of the identified items to facilitate a user locating a particular item. For example, the alternative visualization may include presenting an ordered set of thumbnails corresponding to the items. The user can select the desired item using the alternative visualization and the systems can annotate a location within the image where the item can be located, thereby enabling the user to locate the item in the physical environment.
US10083353B2
Techniques are disclosed to identify a form document in an image using a digital fingerprint of the form document. To do so, the image is evaluated to detect features of the image and generate a boundary around each feature. For each boundary, dimensions of the boundary may be stored in a color channel of a pixel in a second image. Thus, the color of the pixel represents the size of the boundary. The second image is the digital fingerprint of the form. To identify the form corresponding to the digital fingerprint, the digital fingerprint may be compared to digital fingerprints of known forms.
US10083347B2
Automated facial recognition is performed by operation of a convolutional neural network including groups of layers in which the first, second, and third groups include a convolution layer, a max-pooling layer, and a parametric rectified linear unit activation function layer. A fourth group of layers includes a convolution layer and a parametric rectified linear unit activation function layer.
US10083344B2
A facial recognition apparatus comprises a photographing parameter input unit that receives a photographing parameter(s); a lighting information estimation unit that estimates lighting information based on the photographing parameter(s); and a recognition accuracy control unit that controls a recognition accuracy parameter(s) based on the lighting information.
US10083330B2
A method and RFID writer-reader for selecting a RFID data carrier from a plurality of RFID data carriers detected by an RFID writer-reader, wherein the RFID data carrier of the RFID data carriers detected in productive operation is selected based on the respective degree of correspondence between sequences of actual values determined in productive operation that are compared with at least one sequence of setpoint values so as to reliably select a desired RFID data carrier even in difficult reception situations.
US10083307B2
An approach is proposed that contemplates systems, methods, and computer-readable storage mediums to support receiving, from a computerized system, a first encrypted file entity key and signed access metadata, wherein the first encrypted file entity key is created by encrypting a file entity key using a first encryption key, the signed access metadata is signed by the file entity key and the encrypted file entity is created by encrypting a file entity using the file entity key. The approach then determines whether to facilitate the decryption of the encrypted file entity by the computerized system and sends a second encrypted file entity key to the computerized system if it is determined to facilitate the decryption. The approach prevents the computerized system to decrypt the encrypted file entity if it is determined not to facilitate the decryption of the encrypted file entity by the computerized system.
US10083306B2
An Internet-of-Things (IoT) device platform to communicate in a trusted portion of an IoT network is disclosed. The trusted IoT platform can include a secure IoT system-on-chip (SoC) and can be integrated into various devices such that each of the devices may implement “roots of trust” to establish a trusted portion, or a trusted backbone, of the IoT network.
US10083295B2
Particular embodiments described herein provide for an electronic device that can be configured to acquire a plurality of reputations related to an object and combine the plurality of reputations to create a total reputation for the object. The object can include a plurality of sub-objects and each of the plurality of reputations can correspond to one of the sub-objects.
US10083294B2
Described systems and methods allow protecting a computer system from malware, such as return-oriented programming (ROP) exploits. In some embodiments, a set of references are identified within a call stack used by a thread of a target process, each reference pointing into the memory space of an executable module loaded by the target process. Each such reference is analyzed to determine whether it points to a ROP gadget, and whether the respective reference was pushed on the stack by a legitimate function call. In some embodiments, a ROP score is indicative of whether the target process is subject to a ROP attack, the score determined according to a count of references to a loaded module, according to a stack footprint of the respective module, and further according to a count of ROP gadgets identified within the respective module.
US10083292B2
A method and computer for assessing whether a password can be generated by using characteristics of a physical arrangement of keys of an input device. A received password includes characters corresponding to respective select keys in a sequence of select keys of the input device. For each select key, a final detection frequency is calculated as a sum of an initial detection frequency and an additive correction. A password determination value is calculated as a ratio of a total number of select keys having a final detection frequency equal to a minimum detection frequency and the total number of select keys in the sequence of select keys. A determination of whether the calculated password determination value is, or is not, less than a predetermined threshold value indicates that the password cannot, or can, respectively, be generated by using the characteristics of the physical arrangement of keys of the input device.
US10083283B2
Methods and devices for distributing and receiving content are provided. In one example aspect, a method comprises: receiving a command on a first electronic device to output content at an output device associated with a second electronic device; and in response to receiving the command to output content at the output device associated with the second electronic device: providing content access information from the first electronic device to the second electronic device, and adjusting a security state on the second electronic device.
US10083282B2
Methods, systems, and computer program products are included for authenticating computing devices. An exemplary method includes associating a security key with an operating system of a first computing device, wherein the security key is generated from a serial number corresponding to the first computing device. A token corresponding to the security key is sent to a second computing device. The token is accessed by the second computing device to authenticate the first computing device. An authenticated session is established between the first computing device and the second computing device. Within the authenticated session, a connection is provided between the first computing device and the second computing device.
US10083281B2
A terminal device for sharing a display of a content with another terminal device, includes a unit configured to determine a role of an own-device, from between a first or second role, the first role for applying an operation performed on the content to the content of the other terminal device, and the second role for performing a part of the operation of the first role; a unit configured to receive a part of the operation of first role, and apply the operation to the content included in the other terminal device, when the own-device has the second role; and a unit configured to display the content included in the own-device upon applying the operation performed at the terminal device having the first role, based on information from the first role, when the own-device does not have the first role.
US10083280B2
A medical device is disclosed. The medical device includes an RFID reader for receiving information from at least one RFID transponder. The medical device also includes a memory for storing a database and at least one processor for processing information. Also, a remote controller for a medical device is disclosed. The remote controller includes an information receiver for receiving information related to food. The infusion device also includes a memory for storing a database and at least one processor for processing information. A method for use in a medical device is also disclosed. The method includes receiving information from an RFID transponder related to food. Also, the processing the information by comparing the information to a database is included in the method. The method also includes determining the acceptability of the food and providing information related to acceptability to the user.
US10083278B2
The present teaching relates to surgical procedure assistance. In one example, a plurality of similarity measures are determined between a first set of positions and a plurality of second sets of positions, respectively. The first set of positions is obtained with respect to a plurality of sensors coupled with a patient in an image captured prior to a surgical procedure. The plurality of second sets of positions are obtained from the plurality of sensors and change in accordance with movement of the patient. A target lesion is segmented in the image captured prior to the surgical procedure to obtain a lesion display object. The lesion display object is duplicated to generate a plurality of lesion display objects. The plurality of lesion display objects are presented on a display screen so that a distance between the plurality of lesion display objects changes in accordance with the plurality of the similarity measures.
US10083269B2
A computer implemented system and method is provided for generating a layout of the cell defining a circuit component, the layout providing a layout pattern for a target process technology. The method comprises obtaining an archetype layout providing a valid layout pattern for the cell having regard to design rules of the target process technology, and receiving an input data file providing a process technology independent schematic of the circuit component for which the cell is to be generated. A schematic sizing operation is then performed on the input data file, having regard to both schematic constraints applicable to the target process technology and layout constraints derived from the archetype layout, in order to generate an output data file providing a process technology dependent schematic of the circuit component. A cell generation operation is then performed using the output data file and layout data determined from the archetype layout in order to generate the layout of the cell. Such an approach enables both the schematic and layout to be co-optimized during generation of the layout of the cell.
US10083268B2
A computer-implemented method obtains data describing a plurality of synthesis scenarios associated with a very-large-scale integration design (VLSI), wherein each synthesis scenario describes a different combination of tunable design parameters for a macro of the VLSI design, and wherein the VLSI design includes a plurality of macros being tuned. The plurality of macros is ranked based on the data. The ranking produces a macro waiting list that identifies those of the synthesis scenarios that are associated with each of the macros. A subset of the synthesis scenarios is pushed from the macro waiting list to a job submission queue that is separate from the macro waiting list. The job submission queue ranks the subset of synthesis scenarios in an order in which they are to be synthesized by a synthesis tuning system. At least one synthesis scenario is submitted to the synthesis tuning system according to the order.
US10083254B2
A method is presented for modeling reservoir properties. The method includes an auxiliary time-stepping procedure of the reservoir between an old time and a new time, and calculating a plurality of masses explicitly. A plurality of phase component densities is updated linearly from the plurality of masses. A plurality of saturation changes is calculated based on the plurality of masses. A plurality of phase flow rates is updated based on the plurality of saturation changes, a plurality of phase flow rates at the old time, and a plurality of saturation derivatives of the phase flow rates at the old time. A plurality of component flow rates may be calculated based on the updated plurality of phase component densities and the plurality of phase flow rates. The method also includes a formulation method based on the auxiliary time stepping procedure.
US10083250B2
Embodiments relate to simplifying large and complex networks and graphs using global connectivity information based on calculated node centralities. An aspect includes calculating node centralities of a graph until a designated number of central nodes are detected. A percentage of the central nodes are then selected as pivot nodes. The neighboring nodes to each of the pivot nodes are then collapsed until the graph shrinks to a predefined threshold of total nodes. Responsive to the number of total nodes reaching the predefined threshold, the simplified graph is outputted.
US10083234B2
In embodiments, the present invention provides a method and system for delivery of content on a mobile media platform, providing an automated tag processing facility, and delivering content to a mobile device, wherein content delivery is based at least in part on the automated tag processing.
US10083231B1
A method, computer system, and a computer program product for building and applying fuzzy term partitions is provided. The present invention may include building a fuzzy category taxonomy. The present invention may also include implementing the built fuzzy category taxonomy into a fuzzy category classifier. The present invention may then include building a fuzzy term extractor. The present invention may further include building a fuzzy term association map. The present invention may also include processing a plurality of words stored on a database. The present invention may then include extracting a fuzzy term from the processed plurality of words. The present invention may further include associating the extracted fuzzy term with a plurality of context data. The present invention may also include producing a context data partition for the extracted fuzzy term. The present invention may then include applying a weight to the extracted fuzzy term.
US10083226B1
The specification relates to a method of receiving a first query and a second query. The method analyzes the second query for a presence of anaphora. If anaphora is present, the method analyzes the first query for a presence of an entity that can be associated with the anaphora. If the analysis analyzing the first query returns two or more associated entities, the method forms a third query wherein the anaphora of the second query is replaced with one of the associated entities and forms a fourth query wherein the anaphora is replaced with the other of the associated entities. The third query and the fourth query are sent to a query-ranking engine. The third query and the fourth query receive a ranking and the higher-ranked query is sent to a search engine.
US10083213B1
A question and answer based customer support system is provided through which users submit question data representing questions to be answered using support resources. Low quality and/or high quality question formats are defined and questions having a low quality question format are labeled improperly formatted questions, while questions having a high quality question format are labeled properly formatted questions. Received question data is analyzed to determine if the question data represents an improperly or properly formatted question before allocating support resources to generating an answer. If, a determination is made that the question data represents an improperly formatted question, corrective actions are taken before allocating support resources to generating an answer. If a determination is made that the question data represents a properly formatted question, the question represented by the question data is allocated support resources to generate an answer on a priority basis.
US10083207B2
In one embodiment, a method for improving cardinality estimation of a join predicate between a fact table and an overloaded dimension table is provided. The method includes receiving a dimension table and a fact table in a join predicate of one or more SQL statements. The method further includes identifying a majority of records in the fact table that refer to a subset of records in the dimension table. The method further includes computing a filter factor of the join predicate between the dimension table and the fact table. The method further includes creating a statistical view using one or more relevant portions of the dimension table that are referred to by the fact table.
US10083206B2
Embodiments effect the combination of data from different tables (e.g., of an underlying database), and the visualization of that combined table data in an incremental manner. Columns from a second table may be selectively combined with those of a first table, manually by user selection and/or automatically by best guess matching. Such matching may be based upon commonalities between table column headers. A menu may allow user selection of specific table(s)/table column(s) to be combined with a first table, as well as a manner of that combination (e.g., particular types of SQL join operations). The table data combination process is visualized step-by-step (e.g., allowing toggling and forward/backward navigation between interface screens), ensuring the user is able to follow data migration in the combined workflow, and appreciate/recognize changing values resulting therefrom. Particular embodiments may leverage the processing power of an in-memory database engine to accomplish combination and/or visualization of table data.
US10083199B1
A method of migrating data entries stored in a distributed data store from a source memory device of the data store to a target memory device of the data store. The method comprises locking a data entry in the source memory with a soft locking mechanism by an application executing on a computer system, reading the data entry in the source memory by the application, cloning the data entry in a shadow journal in the target memory by the application, launching a plurality of alias redirection threads by the application, where each remaps one of a plurality of aliases of the data entry from referencing the location of the data entry in the source memory to referencing the location of the data entry in the target memory, and committing the data entry in the shadow journal to the target memory by the application.
US10083194B2
The invention presents a process for obtaining candidate reference data to compare to a data to be identified, implemented in a system comprising a client unit and a storage server comprising two databases, in which: —the first database comprises indexed memory blocks each comprising a corresponding encrypted indexed reference data, and —the second database comprises memory blocks indexed by all possible hash values obtained by a plurality of k indexed hash functions, and wherein each block contains a list of the indexes of the reference data which hashing by one of said hash function results in the hash value corresponding to said block, said process comprising the steps during which: —the client unit hashes the data to be identified with each of the plurality of hash functions, and reads the k memory blocks of the second database corresponding to the hash values thus obtained, the client unit identifies indexes contained in at least t out of k read memory blocks, and —the client unit reads the memory blocks of the first database indexed by the identified indexes in order to obtain the corresponding indexed reference data, said data being candidate data to compare to the data to be identified, the steps of reading memory blocks of the databases being carried out by executing a protocol preventing the storage server from learning which memory blocks of the databases are read. Another object of the invention is a system for the secure comparison of data.
US10083190B2
Embodiments are directed towards a dynamic change evaluation mechanism, whereby items having a detected possible change are scheduled for re-evaluation for possible changes at a higher frequency than items detected to not have previously changed, while those items detected as not to have changed are dynamically scheduled for re-evaluation based on an evaluation backlog that may be in turn based, in part, on a time from when an item is assigned an expiration time to when the item is evaluated. In one embodiment, a possibly changed item may be assigned a new expiration time independent of the evaluation backlog. In another embodiment, if no change is detected, then the item may be assigned a new expiration time as a function of a previous expiration time and on the evaluation backlog.
US10083186B2
A system for large-scale crowd sourcing of map data cleanup and correction, comprising an application server that generates image data, sends image data to a user device, receives tagging data provided by the device user, and provides tags to a crowdsourced search and locate server based on tagging data from a user device, a crowdsourced search and locate server that receives tags from an application server, computes agreement and disagreement values and performs expectation-maximization analysis, and a map data server that stores and provides map data, and a method for estimating location and quality of a set of geolocation data.
US10083179B2
A respective volatility attribute associated with each of one or more tables of a computerized database is used to adjust an extension file size value associated with a database table file space. Various optional additional uses of a volatility attribute to manage a database are disclosed. Preferably, database parameters are automatically monitored over time and database table volatility state is automatically determined and periodically adjusted.
US10083177B2
Some examples include caching data among multiple interconnected computing devices. As one example, a storage server may transmit a first data set to a first computing device, and may identifying a second computing device from a plurality of computing devices sharing a local area network with the first computing device. For instance, the second computing device may be selected from the plurality of computing devices based on battery levels of the plurality of computing devices. The storage server may identify a second data set as relevant to the first data set and may transmit the identified second data set to the second computing device. Additionally, the storage server may transmit an instruction to the first computing device indicating that the second computing device stores a data cache for the first computing device.
US10083176B1
A set of trigrams can be generated for each document in a plurality of documents processed by an e-discovery system. Each trigram in the set of trigrams for a given document is a sequence of three terms in the given document. A set of trigrams for each similar document is then determined based on the set of trigrams for the original document. To facilitate identification of the similar documents, a full text index is then generated for the plurality of documents and the set of trigrams for each document are indexed into the full text index, as individual terms. Queries can be generated into the full text index based on trigrams of a document to determine other similar or near-duplicate documents. After a set of potentially similar documents are identified, a separate distance criteria can be applied to evaluate the level of similarity between the two documents in an efficient way.
US10083173B2
A system, computer program product, and process are provided for artificial intelligence based language interpretation. A storage device has a terminology database that stores a plurality of terms utilized in a previous communication requesting a product and/or a service in a first spoken language, a plurality of responses in a second spoken language to the communication, and (a plurality of outcomes based upon the plurality of responses. The second spoken language being distinct from the first spoken language. Further, a processor learns to generate responses associated with corresponding terms in a request based upon an analysis of the plurality of outcomes from the terminology database, receives a request for a product and/or service in the first spoken language in a current communication, and generates a message having a response that is associated with a term present in the request.
US10083162B2
A computer-implemented technique is described for generating a textual narrative based on a set of input images. In one scenario, the end user captures the set of input images while visiting one or more locations. The generated narrative describes the user's travel experience at those locations in a cohesive manner. In one implementation, the technique generates the narrative based on information extracted in offline fashion by a knowledge acquisition component. The knowledge acquisition component, in turn, produces the knowledgebase by mining one or more knowledge sources (such as one or more travel blogs) that provide image-annotated textual travel narratives. The technique can therefore be said to reuse common elements in the travel narratives of others in describing the user's own set of input images.
US10083159B1
A method and system for recording, editing, and playback of web browser sessions, which captures a series of user visits to web pages, including the initial state of each page and all user interactions with the web pages, are provided. An application uses a web browser's native API (application programming interface) to record and store web pages and user interactions in a unique data format (not as video). Using the browser's native API for recording makes it possible to edit the recording of the user's web session, modifying the recording in ways that are not possible with video recording. The recorder application comprises a core engine implemented in JavaScript and various server configurations, either local or remote, for playback.
US10083152B1
A system on a chip may include a plurality of data plane processor cores sharing a common instruction set architecture. At least one of the data plane processor cores is specialized to perform a particular function via extensions to the otherwise common instruction set architecture. Such systems on a chip may have reduced physical complexity, cost, and time-to-market, and may provide improvements in core utilization and reductions in system power consumption.
US10083126B2
An apparatus and method are provided for avoiding conflicting entries in a storage structure. The apparatus comprises a storage structure having a plurality of entries for storing data, and allocation circuitry, responsive to a trigger event for allocating new data into the storage structure, to determine a victim entry into which the new data is to be stored, and to allocate the new data into the victim entry upon determining that the new data is available. Conflict detection circuitry is used to detect when the new data will conflict with data stored in one or more entries of the storage structure, and to cause the data in said one or more entries to be invalidated. The conflict detection circuitry is arranged to perform, prior to a portion of the new data required for conflict detection being available, at least one initial stage detection operation to determine, based on an available portion of the new data, candidate entries whose data may conflict with the new data. A record of the candidate entries in then maintained, and, once the portion of the new data required for conflict detection is available, the conflict detection circuitry then performs a final stage detection operation to determine whether any of the candidate entries do contain data that conflicts with the new data. Any entries identified by the final stage detection operation as containing data that conflicts with the new data are then invalidated. This provides a particularly efficient mechanism for avoiding conflicting entries in a storage structure.
US10083124B1
A translation engine for a processor system to translate virtual memory addresses to physical addresses of a main memory of a computer system is provided, where a sequence of accesses to multiple address translation tables is performed to support a computer system virtualization level. The translation engine includes: a first pipeline having at least, a first pipeline stage to receive a value for an original address or an address translation table entry requested in a previous pass through the first pipeline; a second pipeline stage using the value as an operand in a translation operation eventually yielding the address translation result or yielding a table index to an entry in a next address translation table; and a third pipeline stage issuing a read request for the entry in the next address translation table.
US10083122B2
Subject matter disclosed herein relates to techniques to perform transactions using a memory device.
US10083121B2
A storage system which efficiently achieves access with different Keys is provided. A data storage unit 340 of each of data nodes 300 stores a part assigned to the data node 300 of each of main and sub tables. The main and sub tables respectively use first and second data elements as Key. When a value of one data element of the first and second data elements is inputted, the data acquisition unit 330 obtains a data set including the inputted value from the assigned part of a table that uses the one data element as Key, using the inputted value as Key. Alternatively, the data acquisition unit 330 obtains a data set including the inputted value from the assigned part of a table that uses the other data element as Key, using a value of the other data element corresponding to the inputted value as Key.
US10083116B2
A method of controlling a storage device and a random access memory includes, when a size of write-requested data is greater than a threshold, writing the write-requested data in the storage device and writing an address of the storage device in which the write-requested data is written in the random access memory. When the size of the write-requested data is smaller than or equal to the threshold, the write-requested data is written in the random access memory. The threshold is correlated to a size greater than a size of an area allocated to store the address in the random access memory.
US10083107B2
Certain aspects of the present disclosure relate to a method and apparatus for visualizing events received and processed by a plurality of software agents in a distributed system. Aspects of the present disclosure generally include receiving, for each software agent, a recording identifying one or more events occurring on that software agent, generating a visualization showing a timeline for one or more of the plurality of software agents wherein the visualization represents each event consumed or emitted by the one or more software agents as an icon on the timeline ordered based on the time the event is consumed or emitted, receiving a request indicating at least a first one of the icons in the visualization, determining, for the event corresponding to the first icon, a causal chain of events related to that event, and updating the icons corresponding to events in the causal chain of events to present an ordered sequence of events in the causal chain of events that occurred relative to the event corresponding to the first one of the icons.
US10083093B1
A method, system, and program product for enabling a virtual service layer to consume a storage medium of a first site and a storage medium of a second site, enabling the virtual service layer to map the storage mediums of the first and second sites as one or more virtual storage volumes, wherein the one or more storage volumes are mirrored between the first and second site, and enabling the virtual service layer to create a write order fidelity delta set of the virtual storage volumes by writing the delta set to backend storage and notifying a splitter to which delta set the IO belongs.
US10083089B2
A method to efficiently checkpoint and reconstruct an in-memory index associated with a log-structured object store includes enabling asynchronous write operations to occur to a log-structured object store. The log-structured object store utilizes an in-memory index to access objects therein. The method further enables checkpoint operations to occur to the log-structured object store without pausing the asynchronous write operations. When initiating checkpoint operations, the method establishes a “begin checkpoint” marker on the log-structured object store. This “begin checkpoint” marker is configured to point to an earliest address in the log-structured object store that is uncommitted to the in-memory index. In the event the in-memory index is lost, the method reconstructs the in-memory index by analyzing the log-structured object store starting from the earliest address uncommitted to the in-memory index. A corresponding system and computer program product are also disclosed.
US10083085B2
Described herein are systems, methods, and software to manage metadata in a data storage device. In one example, a data storage device includes a first storage zone, a shingled magnetic recording (SMR) zone, and a storage control system. The storage control system is configured to maintain metadata in a metadata location of the first storage zone for user data in the SMR zone. The storage control system is further configured to, responsive to a usage condition being satisfied for the metadata in the metadata location, identify metadata locations in the SMR zone to redirect and store the metadata. The storage control system is also configured to maintain an indirection data structure in the metadata location of the first zone that correlates the metadata locations in the SMR zone to the metadata.
US10083084B2
A method of error detection during a booting process of a computer system includes: for each of setting variables of a BIOS program, determining whether or not a respective one of stored values corresponding to the setting variable is in a respective one of value ranges corresponding to the setting variable according to a variable range comparison table; and when it is determined that for at least one of the setting variables, the stored value corresponding thereto is not in the respective one of the value ranges, updating, according to a variable definition file, the at least one of the setting variables using one of preset default values corresponding to the at least one of the setting variables.
US10083074B2
Mechanisms for controlling access to storage volumes on the secondary storage system is provided. A determination is made as to whether a first site computing device has sent a notification of a failure condition of a first site. In response to a determination that the notification of the failure condition of the first site has not been received, secondary workloads of a second site computing device are permitted to access storage volumes on the secondary storage system. In response to a determination that the notification of the failure condition of the first site has been received, a mode of operation of the second site is modified from a normal mode of operation to a failure mode of operation. In the failure mode of operation, the storage system controller of the second site blocks at least a portion of access requests from secondary workloads of the second site computing device.
US10083072B2
A non-transitory computer readable storage medium storing therein an abnormality handling determination program that causes a computer to execute a process, the process includes, acquiring state information of appointed items regarding to a state of each of a plurality of devices in a system depending on a detection of abnormal information of a first device among the plurality of devices, judging whether the state information of the first device deviates from the distribution range of the state information calculated by the state information of the devices except the first device for every item, and determining a handling for the first device based on a result of the judgment.
US10083071B2
An anomaly detector for a Controller Area Network (CAN) bus performs state space classification on a per-message basis of messages on the CAN bus to label messages as normal or anomalous, and performs temporal pattern analysis as a function of time to label unexpected temporal patterns as anomalous. The anomaly detector issues an alert if an alert criterion is met that is based on the outputs of the state space classification and the temporal pattern analysis. The temporal pattern analysis may compare statistics of messages having analyzed arbitration IDs with statistics for messages having those analyzed arbitration IDs in a training dataset of CAN bus messages, and a temporal pattern is anomalous if there is a statistically significant deviation from the training dataset. The anomaly detector may be implemented on a vehicle Electronic Control Unit (ECU) communicating via a vehicle CAN bus. The anomaly detector does not rely on an database of messages and their periodicity from manufacturers (dbc files) and in that sense is truly a zero knowledge detector.
US10083062B2
The subject technology addresses the need in the art for improving intra-cloud migration of virtual machines in a cloud computing environment. A hash database may be prepopulated with key-value pairs corresponding to hash IDs and associated data chunks of a virtual machine image. In this regard, the virtual machine image may be divided into chunks using boundaries chosen by a Rabin fingerprinting technique. A hash (e.g., MD5 or SHA-1) may be computed over each chunk and act as a unique identifier for the data contained in each chunk. At appropriate times, one or more hash IDs are sent instead of the actual data chunks between clouds when performing the inter-cloud migration of a virtual machine.
US10083060B2
A system for processing a batch job comprises a processor and a memory. The processor is configured to receive a batch job comprising a sequential or parallel flow of operations, wherein each operation has a defined input type and a defined output type. The processor is further configured to verify that the batch job can run successfully, wherein verifying includes checking that a first operation output defined type is compatible with a second operation input defined type when a first operation output is connected to a second operation input, and wherein verifying includes checking that a parameter used by a calculation in an operation is input to the operation. The memory is coupled to the processor and configured to provide the processor with instructions.
US10083051B1
An operations management system includes a processing system and a memory for storing an operations management application, which is executed by the processing system to collect resource information associated with hardware resources and virtual objects of a virtual computing environment. The system identifies, for one or more services provided by the virtual computing environment, the hardware resources and the virtual objects that execute the services, generates a tag for each resource indicating which services are executed by that resource, and stores the collected resource information for each resource and its respective tag in the memory.
US10083049B2
An information processing device includes first and second detectors and a controller. The first detector detects a shipping situation of an apparatus. The second detector detects that a predetermined operation has been performed. The controller performs control so that a detection result indicating the shipping situation of the apparatus will be stored in a first memory until the second detector detects that the predetermined operation has been performed. After the second detector detects that the predetermined operation has been performed, the first detector is switched to be able to detect an operating condition of the apparatus.
US10083048B2
Provided are systems, methods, and architectures for a neutral input/output (NIO) platform that includes a core that supports one or more services. The core may be thought of as an application engine that runs task specific applications called services. The services are constructed using defined templates that are recognized by the core, although the templates can be customized. The core is designed to manage and support the services, and the services in turn manage blocks that provide processing functionality to their respective service. Due to the structure and flexibility provided by the NIO platform's core, services, and blocks, the platform can be configured to a synchronously process any input signals from one or more sources and produce output signals in real time.
US10083047B2
A multitasking system and method are provided. The system and method allows a mobile device with a limited amount of resources to execute applications in full and mini modes, thereby using a relatively small amount of resources and efficiently using the execution screens. The method includes detecting a first event for executing a first application, identifying the type of first execution event, executing the first application in at least one of a full mode and a mini mode according to the type of first execution event, and displaying an execution screen of the first application executed in the at least one mode.
US10083043B2
A method for accessing a signal value of an FPGA at runtime, including the steps of loading an FPGA hardware configuration into the FPGA, executing the FPGA hardware configuration in the FPGA, requesting a signal value of the FPGA, sending status data from a functional level of the FPGA to a configuration memory in its configuration level, reading the status data from the configuration memory as readback data, and determining the signal value of the readback data. A method is also provided for making an FPGA build, based on an FPGA model, using a hardware description language, including the steps of creating an FPGA hardware configuration, identifying memory locations of a configuration memory for status data of at least one signal value based on the FPGA hardware configuration, and creating a list with signal values accessible at runtime and the memory locations corresponding thereto.
US10083042B2
A mobile terminal and a method for controlling the mobile terminal are disclosed. A mobile terminal according to one embodiment of the present invention comprises at least one sensor; a first processor for controlling operation of the at least one sensor; a second processor for controlling an application; and a vibration unit detecting a force applied by the user, where the vibration unit is woken up when a force applied by the user exceeds a predetermined magnitude while the at least one sensor, the first processor, the second processor, and the vibration unit are all in a sleep state; and if the first processor is woken up by the vibration unit, the first processor wakes up the second processor based on sensing data collected by the at least one sensor.
US10083041B2
A method for outputting alternative instruction sequences. The method includes tracking repetitive hits to determine a set of frequently hit instruction sequences for a microprocessor. A frequently miss-predicted branch instruction is identified, wherein the predicted outcome of the branch instruction is frequently wrong. An alternative instruction sequence for the branch instruction target is stored into a buffer. On a subsequent hit to the branch instruction where the predicted outcome of the branch instruction was wrong, the alternative instruction sequence is output from the buffer.
US10083040B2
Processing circuitry can operate in a secure domain and a less secure domain. In response to an initial exception from background processing performed by the processing circuitry, state saving of data from a first subset of registers is performed by exception control circuitry before triggering an exception handling routine, while the exception handling routine has responsibility for performing state saving of data from a second subset of registers. In response to a first exception causing a transition from the secure domain from a less secure domain, where the background processing was in the less secure domain, the exception control circuitry performs additional state saving of data from the second set of registers before triggering the exception handling routine. In response to a tail-chained exception causing a transition from the secure domain to the less secure domain, the exception handling routine is triggered without performing an additional state saving.
US10083038B2
An apparatus including first and second reservation stations. The first reservation station dispatches a load micro instruction, and indicates on a hold bus if the load micro instruction is a specified load micro instruction directed to retrieve an operand from a prescribed resource other than on-core cache memory. The second reservation station is coupled to the hold bus, and dispatches one or more younger micro instructions therein that depend on the load micro instruction for execution after a number of clock cycles following dispatch of the first load micro instruction, and if it is indicated on the hold bus that the load micro instruction is the specified load micro instruction, the second reservation station is configured to stall dispatch of the one or more younger micro instructions until the load micro instruction has retrieved the operand. The resources include a system memory that is accessed via a memory bus, the system memory comprising one or more page tables, configured to store one or more mappings between virtual addresses and physical addresses.
US10083037B2
An apparatus and method are described for providing low-latency invocation of accelerators. For example, a processor according to one embodiment comprises: a plurality of simultaneous multithreading (SMT) cores, at least one shared cache circuit to be shared among the SMT cores, and at least one L2 cache circuit to store both instructions and data. The processor further comprises a communication interconnect circuit including a PCIe circuit to communicatively couple one or more of the SMT cores to an accelerator device, the PCIe circuit to provide the accelerator device access to resources of the processor including the at least one shared cache circuit. The processor further comprises a memory access circuit to identify an accelerator context save/restore region in a memory determined by an accelerator context save/restore value, the accelerator context save/restore region to store an accelerator context state.
US10083035B2
A streaming engine employed in a digital data processor specifies fixed first and second read only data streams. Corresponding stream address generator produces address of data elements of the two streams. Corresponding steam head registers stores data elements next to be supplied to functional units for use as operands. The two streams share two memory ports. A toggling preference of stream to port ensures fair allocation. The arbiters permit one stream to borrow the other's interface when the other interface is idle. Thus one stream may issue two memory requests, one from each memory port, if the other stream is idle. This spreads the bandwidth demand for each stream across both interfaces, ensuring neither interface becomes a bottleneck.
US10083030B1
An asynchronous dependency resolution system receives a request to store a first application component in an application repository, stores a first dependency map for the first application component in a dependency repository, and generates a first executable bundle for the first application component. The asynchronous dependency resolution system determines that the dependency repository comprises a first association between the first application component and a second application component, where the first application component is a dependency of a second application component, obtains source code for the second application component, and generates a second executable bundle for the second application component using the source code for the first and second application components.
US10083029B2
An example method of detecting incompatibility between an application and an application dependency includes identifying a first set of contracts exposed in a first version of an application dependency. Each contract includes a symbol and a corresponding signature. The example method also includes comparing the first set of contracts to a corresponding second set of contracts exposed in a second version of the application dependency. The example method further includes determining, based on the comparing, whether the first set of contracts matches the second set of contracts. If the first set of contracts matches the second set of contracts, an indication that the second set of contracts is compatible with the application is provided. If the first set of contracts does not match the second set of contracts, an indication that the second set of contracts is not compatible with the application is provided.
US10083024B2
The technology disclosed relates to thwarting attempts in between software releases to take advantage of security holes in web applications. A virtual patch is a data object comprising an identifier that indicates a relevant local context for the patch and may be created while the application is running. One or more conditions included in the patch are evaluated using data from a service request or from the local context. A patch directive specifies an action to perform when the one or more conditions are satisfied. A virtual patch may be applied to the running application without requiring replacing the application code. Responsive to a request for a web service, a web application may execute code in multiple distinct local contexts such as session management, authorization, and application-specific business logic. The code for each local context may independently retrieve a set of virtual patches relevant to its particular local context.
US10083022B2
For automatically applying update to snapshots of a virtual machine (VM), a cloned virtual machine is created reproducing a state of an existing first snapshot of a virtual machine, a first virtual NIC in the cloned VM is disabled, an update is applied to the cloned VM to which a second virtual NIC has been added, the second virtual NIC is deleted from the cloned VM to which the update has been applied, the first virtual NIC is enabled, and a second snapshot of the cloned VM is generated with the enabled first virtual NIC wherein the second snapshot is associated with the virtual machine.
US10083011B2
A smart tuple manager includes a mechanism for splitting a smart tuple, and for automatically generating one or more classes from existing classes when a smart tuple is split. When a first smart tuple is split into second and third new smart tuples, classes for the second and third smart tuples are automatically generated from the class for the first smart tuple. The classes for the second and third smart tuples are subsets of the data elements and code segments in the first class. After a class is automatically generated, new code segments may be added to the class as needed.
US10083010B2
A method for capturing patterns and associated points of variability includes providing an XML schema defining elements representing different point of variability (POV) types for a pattern. The elements belong to an XML schema “substitution group” to enable the POV types to be substituted for one another. In selected embodiments, the method enables a pattern author to add new or custom POV types to the “substitution group,” thereby allowing the pattern author to extend the pattern meta model to include new POV types. Once the desired POV types are defined, the method enables the pattern author to generate an instance of the XML schema, defining the points of variability for a specific pattern, using the elements defined in the XML schema “substitution group.” A corresponding apparatus and computer program product are also disclosed and claimed herein.
US10083007B2
Devices and methods for filtering data include calculating intermediate input values from input elements using a transformation function. The transformation function is based at least in part on a size of the filter and a number of filter outputs. Intermediate filter values are calculated from filter elements of the filter using the transformation function. Each intermediate input value is multiplied with a respective intermediate filter value to form intermediate values. These intermediate values are combined with each other using the transformation function to determine one or more output values.
US10083005B2
A user speech interface for interactive media guidance applications, such as television program guides, guides for audio services, guides for video-on-demand (VOD) services, guides for personal video recorders (PVRs), or other suitable guidance applications is provided. Voice commands may be received from a user and guidance activities may be performed in response to the voice commands.