The invention relates to a vertical surrounding grid junction type field effect transistor, a preparation method and applications thereof. The field effect transistor comprises a source area, a drain area, a surrounding grid, a sensitive grid, a channel and a source-drain area press welding block or metal lead; wherein the source area and the drain area are connected through the channel; the sensitive grid and the surrounding grid are connected; the surrounding grid surrounds the upper surface, the left surface and the right surface of the channel which is vertical; the channel and the surrounding grid form a Pn junction; the source area and the drain area are electrically connected with an external circuit through the press welding block or the metal lead. The field effect transistor and a sensitive structure are manufactured on the top layer silicon of an SOI silicon chip and are simultaneously manufactured by adopting a micro-mechanical processing method. The displacement detection on the sensitive structure is realized through capacitance coupling.