发明公开
- 专利标题: Self adjusting phase lock circuit
- 专利标题(中): 自调整相锁电路
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申请号: EP88120320.2申请日: 1988-12-06
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公开(公告)号: EP0320748A3公开(公告)日: 1989-09-13
- 发明人: Vitiello, Paolo , Bergamo, Luca
- 申请人: BULL HN INFORMATION SYSTEMS ITALIA S.p.A.
- 申请人地址: Via Martiri d'Italia 3 10014 Caluso (Torino) IT
- 专利权人: BULL HN INFORMATION SYSTEMS ITALIA S.p.A.
- 当前专利权人: BULL HN INFORMATION SYSTEMS ITALIA S.p.A.
- 当前专利权人地址: Via Martiri d'Italia 3 10014 Caluso (Torino) IT
- 优先权: IT2307887 19871218
- 主分类号: H03L7/14
- IPC分类号: H03L7/14
摘要:
Self adjusting phase lock circuit in which a frequency and/or phase comparator (1) compares the frequency and/or phase of a reference signal FVCO with the frequency and/or phase of a frequency or phase modulated signal RD to generate an error signal input to an integrating network (3,4), which in turn generates an error voltage related to the frequency/phase error of the two signals, said voltage being input to the control input of a voltage controlled oscillator (2) which generates reference signal FVCO as a function of the error voltage and of an adjusting voltage received at an adjusting input, wherein self adjusting means are provided consisting in a fixed reference voltage periodically input to the oscillator control input as a substitute for the error voltage, in a source of a fixed frequency signal, periodically input to the comparator (9) as a substitute for the modulated signal, in an operational network generating from the error voltage a feedback signal (VRANGE) periodically input to the adjusting input of the oscillator (2) and hold at said input by sample and hold circuits (10,11,17), so that the adjusting voltage VRANGE is periodically adjusted in automatic way to provide to the phase lock circuit an operative condition permanently close to a nominal working point, independently of thermal drift and performance spread of the used components.
公开/授权文献
- EP0320748B1 Self adjusting phase lock circuit 公开/授权日:1993-02-17
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