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EP0351896A3 Bi-cmos logic array 失效
BI-CMOS逻辑阵列

Bi-cmos logic array
摘要:
An integrated circuit logic array is fabricated using a BiCMOS process so that it includes an optimum number of bipolar drivers. This is accomplished by means of a chip architecture having three regions: the array core is all CMOS logic gates; surrounding the core is a BiCMOS region; at the periphery of the array are simple bipolar and CMOS devices for I/O purposes. The chip can be fabricated to use these regions to create circuit paths of varying complexity, depending on the application. In a second embodiment, the array consists of cells each containing one bipolar device and several contiguous CMOS gates.
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