发明公开
EP0631149A1 Method and apparatus for testing of integrated circuit chips
失效
Verfahren und Apparat zum Testen von integrierte Schaltungchips。
- 专利标题: Method and apparatus for testing of integrated circuit chips
- 专利标题(中): Verfahren und Apparat zum Testen von integrierte Schaltungchips。
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申请号: EP94107216.7申请日: 1994-05-09
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公开(公告)号: EP0631149A1公开(公告)日: 1994-12-28
- 发明人: Anschel, Morris , Ingraham, Anthony Paul , Lamb, Charles Robert , Lowell, Michael David , Markovich, Voya Rista , Mayr, Wolfgang , Murphy, Richard Gerald , Pierson, Mark Vincent , Powers, Tamar Alane , Reny, Timothy Shawn , Reynolds, Scott David
- 申请人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 申请人地址: Old Orchard Road Armonk, N.Y. 10504 US
- 专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人地址: Old Orchard Road Armonk, N.Y. 10504 US
- 代理机构: Schäfer, Wolfgang, Dipl.-Ing.
- 优先权: US76069 19930611
- 主分类号: G01R31/28
- IPC分类号: G01R31/28
摘要:
A method of testing semi-conductor chips is disclosed. The individual semiconductor chips have I/O, power, and ground contacts. In the method of the invention a chip test fixture system is provided. The chip test fixture system has contacts corresponding to the contacts on the semiconductor chip. The carrier contacts have dendritic surfaces. The chip contacts are brought into electrically conductive contact with the conductor pads on the chip test fixture system. Test signal input vectors are applied to the inputs of the semiconductor chip, and output signal vectors are recovered from the semiconductor chip. After testing the chip is removed from the substrate.
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