摘要:
A method of testing semiconductor chips is disclosed. The individual semiconductor chips have I/O, power, and ground contacts. In the method of the invention a chip carrier is provided. The chip carrier has contacts corresponding to the contacts on the semiconductor chip. The carrier contacts have dendritic surfaces. The chip contacts are brought into conductive contact with the conductor pads on the chip carrier. Test signal input vectors are applied to the inputs of the semiconductor chip, and output signal vectors are recovered from the semiconductor chip. After testing, the chip may be removed from the substrate. Alternatively, the chip may be bonded through the dendritic conductor pads to the substrate after successful testing.
摘要:
A thermally stable photoimaging composition and a method of using the same, especially on circuit boards as a solder mask is provided. The composition includes a polymerizable resin or resin system, a cationic photoinitiator, a solvent, and an optically transparent ceramic filler. Preferably, the composition has a coefficient of thermal expansion of about 28-40 ppm/°C, which closely matches the coefficient of thermal expansion of the solder used on the circuit board components.
摘要:
A multilayered circuit board assembly which includes a plurality of layered subassemblies (20, 40, 60, 80) each having electrically conducting wiring (81, 89) and at least one through hole (35, 55, 65, 85) therein. A first of these subassemblies possesses a greater wiring density than the others while a second subassembly possesses a lesser resistance (and wiring density) than the others.
摘要:
Solder interconnection whereby the gap created by solder connections between an organic substrate (2) and semiconductor device (1) is filled with a composition (7) obtained from curing a thermosetting preparation containing a thermosetting binder; and filler having a maximum particle size of 50 microns.
摘要:
The present invention permits solder joints to be made directly to via and through holes without the solder being wicked into the vias or through holes, by filling plated through holes with a cycloaliphatic epoxy fill composition. When cured and overplated, the fill composition provides support for the solder joint and provides a flat solderable surface for the interconnection. In certain embodiments, the cured fill compositions, offer a further advantage of being conductive. The invention also relates to several novel methods for filling through holes with such fill compositions, and to resistors located in through holes and vias.
摘要:
Small, closely spaced deposits of solder materials may be formed with high volumetric accuracy and uniformity of shape by depositing a layer of conductive material (20) over surfaces of a dielectric layer (16) having apertures or recesses (e.g. blind apertures) and conductors and/or pads (14) exposed by those apertures or recesses, masking regions of the conductive material with a further patterned dielectric layer (30), electroplating solder materials (40) onto regions of the conductive material exposed by the mask, removing the mask (30) and portions of the conductive material (20) by selective etching and reflowing solder (40) away from at least a portion of the surfaces of the apertured dielectric layer (16). Uniformity of electroplating within blind apertures is enhanced by a combination of fluid jet sparging and cathode agitation. Excess conductor material in the resulting solder deposit can be avoided by replacing conductor material (20) with a constituent component of a solder material in an immersion bath prior to electroplating.
摘要:
A method for depositing a conductive metal onto a dielectric substrate is provided. The method includes obtaining a metal sheet having a roughened surface that has the following parameters: R a = 1.25 - 2.0 µm (0.05 - 0.08 mil), R max = 5.0 - 13.75 µm (0.20 - 0.55 mil), S m = 25 - 75 µm (1.00 - 3.00 mil), R p = 5 - 8.75 µm (0.20 - 0.35 mil), and surface area = 562.5 - 781.25 µm² (0.90 - 1.20 square mils) wherein Ra is the average roughness and the arithmetic mean of the departures from horizontal mean line profile; R max is the maximum peak-to-valley height; S m is the mean spacing between high spots at the mean line; R p is the maximum profile height from the mean line; and surface area is the area under the surface profile from each measurement using a Talysurf S-120 profilometer. The sheet is laminated to the dielectric substrate surface by pressing the roughened surface of the metal sheet against the surface of the substrate and then removed from the substrate. The substrate surface is seeded to render it active for electroless plating thereon; and then a metal from an electroless plating bath is plated thereon. In another method, the dielectric substrate is seeded to render it active for electroless plating thereon. A metal is then plated thereon from an electroless plating bath. The plated metal is subjected to temperature of at least about 100°C for a time sufficient to increase the adhesion of the metal to the substrate.
摘要:
The present invention permits solder joints to be made directly to via and through holes without the solder being wicked into the vias or through holes, by filling plated through holes (14) with an epoxy or cyanate fill composition (16). When cured and overplated, the fill composition (16) provides support for the solder joint (22) and provides a flat solderable surface (18) for the inter-connection. In certain embodiments, the cured fill compositions, offer a further advantage of being conductive. The invention also relates to several novel methods for filling through holes with such fill compositions, and to resistors located in through holes and vias.