The invention relates to a non-volatile NOR semiconductor memory device and method for the programming thereof, whereby a number of single transistor memory cells (SZ), arranged in the form of a matrix, may be controlled by either word lines (WL) or by bit lines (BL). Each single transistor memory cell (SZ), thus possesses both a source line (S1, S2) and a drain line (D1, D2), by means of which a selective control of the respective source and drain regions (D, S) is achieved. The leak current can thus be optimally reduced in the semiconductor memory device with minimal space requirement.