A semiconductor memory is provided with a plurality of first memory blocks and a second memory block for reproducing data of the first memory blocks. When a read command and a refresh command conflict with each other, a read control circuit accesses the first memory block according to the refresh command and reproduces read data by using the second memory block. When a write command (WRA) and the refresh command (REFRQ) conflict with each other, a write control circuit operates the memory block according to an order of command reception. Therefore, it is possible to perform refresh operation without being recognized by users. Namely, a user-friendly semiconductor memory can be provided.