发明公开
- 专利标题： SUBSTRATE HAVING A CHARGED ZONE IN AN INSULATING BURIED LAYER
- 专利标题（中）： 与载样基材在区域查出的埋层
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申请号： EP08763204.8申请日： 2008-03-13
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公开(公告)号： EP2269226A1公开(公告)日： 2011-01-05
- 发明人: ALLIBERT, Frédéric , GAUDIN, Gweltaz , LALLEMENT, Fabrice , LANDRU, Didier , LANDRY, Karine , SHAHEEN, Mohamad , MAZURE, Carlos
- 申请人： S.O.I.Tec Silicon on Insulator Technologies
- 申请人地址： Parc Technologique des Fontaines Chemin des Franques 38190 Bernin FR
- 专利权人： S.O.I.Tec Silicon on Insulator Technologies
- 当前专利权人： S.O.I.Tec Silicon on Insulator Technologies
- 当前专利权人地址： Parc Technologique des Fontaines Chemin des Franques 38190 Bernin FR
- 代理机构： Collin, Jérôme
- 国际公布： WO2009112894 20090917
- 主分类号： H01L29/78
- IPC分类号： H01L29/78
摘要：
The invention relates to a substrate comprising successively a base wafer (1), an insulating layer (2) and a top semiconductor layer (3), characterised in that the insulating layer (2) comprises at least a zone wherein the density of charges is in absolute value higher than 10
10 charges/cm
2 . The invention also relates to a process for making such a substrate.
10 charges/cm
2 . The invention also relates to a process for making such a substrate.
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