发明公开
EP2920810A2 BONDING STRUCTURE FOR A MICROELECTRONIC ASSEMBLY COMPRISING A HIGH MELTING POINT ALLOY FORMED BY BONDING TWO BOND COMPONENTS EACH COMPRISING A NON-LOW MELTING POINT MATERIAL LAYER COVERING A LOW MELTING POINT MATERIAL LAYER AND CORRESPONDING MANUFACTURING METHOD
审中-公开
BONDINGSTRUKTUR对于有由通过结合两个组件各有NON-低熔点与低熔点和相关方法的材料层的覆盖物材料层高熔点合金微电子器件
- 专利标题： BONDING STRUCTURE FOR A MICROELECTRONIC ASSEMBLY COMPRISING A HIGH MELTING POINT ALLOY FORMED BY BONDING TWO BOND COMPONENTS EACH COMPRISING A NON-LOW MELTING POINT MATERIAL LAYER COVERING A LOW MELTING POINT MATERIAL LAYER AND CORRESPONDING MANUFACTURING METHOD
- 专利标题（中）： BONDINGSTRUKTUR对于有由通过结合两个组件各有NON-低熔点与低熔点和相关方法的材料层的覆盖物材料层高熔点合金微电子器件
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申请号： EP13811692.6申请日： 2013-12-02
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公开(公告)号： EP2920810A2公开(公告)日： 2015-09-23
- 发明人: UZOH, Cyprian, Emeka
- 申请人： Invensas Corporation
- 申请人地址： 3025 Orchard Parkway San Jose, CA 95134 US
- 专利权人： Invensas Corporation
- 当前专利权人： Invensas Corporation
- 当前专利权人地址： 3025 Orchard Parkway San Jose, CA 95134 US
- 代理机构： Boyce, Conor
- 优先权： US201213692148 20121203
- 国际公布： WO2014088966 20140612
- 主分类号： H01L23/485
- IPC分类号： H01L23/485 ; H01L23/498 ; H01L21/60 ; H05K3/34 ; H01L23/10 ; H01L21/50
摘要：
A microelectronic assembly includes a first substrate having a surface and a first conductive element and a second substrate having a surface and a second conductive element. The assembly further includes an electrically conductive alloy mass joined to the first and second conductive elements. First and second materials of the alloy mass each have a melting point lower than a melting point of the alloy. A concentration of the first material varies in concentration from a relatively higher amount at a location disposed toward the first conductive element to a relatively lower amount toward the second conductive element, and a concentration of the second material varies in concentration from a relatively higher amount at a location disposed toward the second conductive element to a relatively lower amount toward the first conductive element.
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