Embodiments herein describe techniques for a semiconductor device including a first transistor (120) stacked above and self-aligned with a second transistor (110), where a shadow of the first transistor substantially overlaps with the second transistor. The first transistor includes a first gate electrode (129), a first channel layer (123) including a first channel material and separated from the first gate electrode by a first gate dielectric layer (128), and a first source electrode (125) coupled to the first channel layer. The second transistor includes a second gate electrode (109), a second channel layer (103) including a second channel material and separated from the second gate electrode by a second gate dielectric layer (108), and a second source electrode coupled to the second channel layer. The second source electrode is self-aligned with the first source electrode, and separated from the first source electrode by an isolation layer (115). Other embodiments may be described and/or claimed.