Invention Publication
- Patent Title: SYSTEM AND METHOD OF REDUCING DELTA-SIGMA MODULATOR ERROR USING FORCE-AND-CORRECTION
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Application No.: EP23185554.5Application Date: 2023-07-14
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Publication No.: EP4329201A1Publication Date: 2024-02-28
- Inventor: Breems, Lucien Johannes , Bolatkale, Muhammed
- Applicant: NXP B.V.
- Applicant Address: NL 5656 AG Eindhoven High Tech Campus 60
- Agency: Schmütz, Christian Klaus Johannes
- Priority: US202217880868 20220804
- Main IPC: H03M3/00
- IPC: H03M3/00
Abstract:
A delta-sigma modulator including force circuitry that receives an output digital signal and provides a forced digital signal with a predetermined force state based on a force control signal, a combiner that subtracts the forced digital signal from the output digital signal for providing a digital error signal, and force correction circuitry that converts the digital error signal into one or more analog error correction signals applied to corresponding inputs of loop filter circuitry. The digital error signal and the force control signal may each be used to develop corresponding analog feedback signals used to adjust an analog input signal. The digital error signal may also be converted to one or more correction signals applied to corresponding inputs of the loop filter circuitry to correct the output digital signal. The digital error signal may also be used by a digital noise cancellation filter to further correct the output digital signal.
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