该半导体器件包括具有第一主表面和第二主表面，其包括一个装置区域，具有在包围所述装置区的终端区中的第一导电类型的碳化硅层，所述第一主表面，碳化硅层 包括与所述第一主表面接触的第一导电型的第一杂质层，比所述第一杂质层和位于第二主表面侧，所述终止区的第一导电类型的第二杂质层， 具有与所述第一主表面一预定深度的表面部分，第一杂质层的一部分，第二杂质层的一部分，贯穿第一杂质层，第二导电型到达第二杂质层 和包括环区域的终端结构中，第一杂质层的杂质浓度比所述第二杂质层22的杂质浓度，它已经从所述第一主表面的法线方向观察的两倍以上的5倍以上 在与内和外环形区域接触的位置，第一杂质层设置。

The semiconductor device has a first major surface and second major surface, comprising a device region, the silicon carbide layer of a first conductivity type and a termination region surrounding the element region in said first major surface, a silicon carbide layer includes a first conductive type first impurity layer in contact with the first major surface, than the first impurity layer and a second impurity layer of the first conductivity type positioned on the second main surface side, the termination region, the surface portion having a predetermined depth from the first major surface, a portion of the first impurity layer, a portion of the second impurity layer, penetrate the first impurity layer, the second conductivity type reach the second impurity layer and a termination structure comprising of a ring region, the impurity concentration of the first impurity layer is more than 5 times more than twice the impurity concentration of the second impurity layer 22, are viewed from a normal direction of the first main surface , a position in contact with the inner and outer ring region, the first impurity layer is disposed.