一种集成电路，包括三维交叉点内存数组，此三维交叉点内存数组具有设置在N个第一存取线层和P个第二存取线层的交叉点处的M层的记忆胞。此集成电路还包括第一和第二组的第一存取线驱动器。第一组第一存取线驱动器可操作地耦接以将共第一操作电压施加到奇数的第一存取线层中所选择的第一存取线。第二组第一存取线驱动器可操作地耦合以将共第一操作电压施加到偶数的第一存取线层中所选择的第一存取线。多组的第二存取线驱动器可操作地配置来将第二操作电压施加到所选择的第二存取线层中所选择的第二存取线。

An integrated circuit includes a three-dimensional cross point memory array having M levels of memory cells disposed in cross points of N first access line layers and P second access line layers. The integrated circuit further comprises first and second sets of first access line drivers. The first set of first access line drivers is operatively coupled to apply a common first operational voltage to selected first access lines in odd first access line layers. The second set of first access line drivers is operatively coupled to apply the common first operational voltage to selected first access lines in even first access layers. A plurality of sets of second access line drivers is operatively configured to apply a second operational voltage to selected second access lines in selected second access line layers.