- Patent Title: Method for manufacturing semiconductor device using high speed epitaxial lift-off and template for III-V direct growth and semiconductor device manufactured using the same
-
Application No.: US14854221Application Date: 2015-09-15
-
Publication No.: US10014216B2Publication Date: 2018-07-03
- Inventor: Sanghyeon Kim , Daemyeong Geum , Min Su Park , Won Jun Choi
- Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
- Applicant Address: KR Seoul
- Assignee: Korea Institute of Science and Technology
- Current Assignee: Korea Institute of Science and Technology
- Current Assignee Address: KR Seoul
- Agency: NSIP Law
- Priority: KR10-2015-0069836 20150519
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L21/20 ; H01L21/36 ; H01L21/78 ; H01L21/683 ; H01L21/18 ; H01L31/0304 ; H01L29/267 ; H01L29/66 ; H01L29/861 ; H01L29/20
Abstract:
Disclosed is a method for manufacturing a semiconductor device, which includes providing a template having a first substrate and a patterned first III-V group compound layer located on the first substrate, forming a sacrificial layer on the patterned first III-V group compound layer by epitaxial growth, forming a second III-V group compound layer on the sacrificial layer by epitaxial growth, bonding a second substrate made of silicon onto the second III-V group compound layer, and separating the second III-V group compound layer and the second substrate from the template by removing the sacrificial layer.
Public/Granted literature
Information query
IPC分类:
