Invention Grant
- Patent Title: Integrated circuitry and methods of forming transistors
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Application No.: US15357602Application Date: 2016-11-21
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Publication No.: US10020228B2Publication Date: 2018-07-10
- Inventor: Michael A. Smith
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: H01L21/8234
- IPC: H01L21/8234 ; H01L27/092 ; H01L27/088 ; H01L27/085 ; H01L27/06 ; H01L29/78 ; H01L21/265 ; H01L29/66 ; H01L27/02 ; H01L29/06 ; H01L21/8238 ; H01L27/11526 ; H01L27/11573 ; H01L29/08 ; H01L29/788 ; H01L29/792 ; H01L27/11529 ; H01L27/11531

Abstract:
Some embodiments include integrated circuits having first and second transistors. The first transistor is wider than the second transistor. The first and second transistors have first and second active regions, respectively. Dielectric features are associated with the first active region and break up the first active region. The second active region is not broken up to the same extent as the first active region. Some embodiments include methods of forming transistors. Active areas of first and second transistors are formed. The active area of the first transistor is wider than the active area of the second transistor. Dielectric features are formed in the active area of the first transistor. The active area of the first transistor is broken up to a different extent than the active area of the second transistor. The active areas of the first and second transistors are simultaneously doped.
Public/Granted literature
- US20170069538A1 Integrated Circuitry and Methods of Forming Transistors Public/Granted day:2017-03-09
Information query
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