Methods for forming FinFETs having epitaxial Si S/D extensions with flat top surfaces on a SiGe seed layer

Invention Grant

US10020303B2 Methods for forming FinFETs having epitaxial Si S/D extensions with flat top surfaces on a SiGe seed layer 有权

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Patent Title: Methods for forming FinFETs having epitaxial Si S/D extensions with flat top surfaces on a SiGe seed layer
Application No.: US14666464

Application Date: 2015-03-24
Publication No.: US10020303B2

Publication Date: 2018-07-10
Inventor: Hong He , Shogo Mochizuki , Chiahsun Tseng , Chun-Chen Yeh , Yunpeng Yin
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION , Renesas Electronics Corporation
Applicant Address: US NY Armonk JP Kanagawa
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION,RENESAS ELECTRONICS CORPORATION
Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION,RENESAS ELECTRONICS CORPORATION
Current Assignee Address: US NY Armonk JP Kanagawa
Agency: Tutunjian & Bitetto, P.C.
Agent Vazken Alexanian
Main IPC: H01L21/8234
IPC: H01L21/8234 ; H01L21/02 ; H01L21/3105 ; H01L27/088 ; H01L29/04 ; H01L29/66 ; H01L29/78 ; H01L29/06 ; H01L21/306 ; H01L29/08

Methods for forming FinFETs having epitaxial Si S/D extensions with flat top surfaces on a SiGe seed layer

Abstract:

Methods for forming semiconductor devices having non-merged fin extensions. Methods for forming semiconductor devices include forming trenches in an insulator layer of a substrate. Fins are formed in the trenches and a dummy gate is formed over the fins, leaving a source and drain region exposed. The fins are etched below a surface level of a surrounding insulator layer. Fin extensions are epitaxially grown from the etched fins.

Public/Granted literature

US20150194504A1 NON-MERGED EPITAXIALLY GROWN MOSFET DEVICES Public/Granted day:2015-07-09

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232	......场效应工艺
H01L21/8234	.......MIS工艺