- Patent Title: High-bandwidth memory application with controlled impedance loading
-
Application No.: US15337323Application Date: 2016-10-28
-
Publication No.: US10026467B2Publication Date: 2018-07-17
- Inventor: Zhuowen Sun , Yong Chen , Kyong-Mo Bang
- Applicant: Invensas Corporation
- Applicant Address: US CA San Jose
- Assignee: Invensas Corporation
- Current Assignee: Invensas Corporation
- Current Assignee Address: US CA San Jose
- Agency: Lerner, David, Littenberg, Krumholz & Mentlik, LLP
- Main IPC: G11C5/06
- IPC: G11C5/06 ; G11C11/408 ; G11C8/18 ; H01L25/065 ; H01L25/18 ; H01L23/64 ; H01L23/31 ; G11C11/409 ; H01L23/02

Abstract:
A microelectronic assembly can include an address bus comprising a plurality of signal conductors each passing sequentially through first, second, third, and fourth connection regions, and first and second microelectronic packages. The first microelectronic package can include first and second microelectronic elements, and the second microelectronic package can include third and fourth microelectronic elements. Each microelectronic element can be electrically coupled to the address bus via the respective connection region. An electrical characteristic between the first and second connection regions can be within a same tolerance of the electrical characteristic between the second and third connection regions.
Public/Granted literature
- US20170133081A1 HIGH-BANDWIDTH MEMORY APPLICATION WITH CONTROLLED IMPEDANCE LOADING Public/Granted day:2017-05-11
Information query