Invention Grant
- Patent Title: Decoupling capacitors and arrangements
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Application No.: US15125964Application Date: 2014-06-27
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Publication No.: US10026686B2Publication Date: 2018-07-17
- Inventor: Silvio E. Bou-Ghazale , Rany T. Elsayed , Niti Goel
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- International Application: PCT/US2014/044595 WO 20140627
- International Announcement: WO2015/199722 WO 20151230
- Main IPC: H01L27/07
- IPC: H01L27/07 ; H01L23/522 ; H01L27/06 ; H01L49/02

Abstract:
Various embodiments of transistor assemblies, integrated circuit devices, and related methods are disclosed herein. In some embodiments, a transistor assembly may include a base layer in which a transistor is disposed, a first metal layer, and a second metal layer disposed between the base layer and the first metal layer. The transistor assembly may also include a capacitor, including a sheet of conductive material with a channel therein, disposed in the base layer or the second metal layer and coupled to a supply line of the transistor. Other embodiments may be disclosed and/or claimed.
Public/Granted literature
- US20170148728A1 DECOUPLING CAPACITORS AND ARRANGEMENTS Public/Granted day:2017-05-25
Information query
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