Invention Grant
- Patent Title: Apparatus and method for endurance friendly programming using lower voltage thresholds
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Application No.: US15228699Application Date: 2016-08-04
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Publication No.: US10043573B2Publication Date: 2018-08-07
- Inventor: Wei Wu , Yi Zou , Jawad B. Khan , Xin Guo
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Konrad Raynes Davda & Victor LLP
- Agent David W. Victor
- Main IPC: G11C16/04
- IPC: G11C16/04 ; G11C11/56 ; G06F3/06 ; G11C16/10

Abstract:
Provided are a method and apparatus for endurance friendly programming using lower voltage thresholds. A non-volatile memory has storage cells organized as pages programmed using a first number of threshold voltage levels. The storage cells are organized into storage cell groups to which data is written. Each storage cell group is programmed to store a first number of bits of information. A memory controller selects a second number of bits of information from pages less than the first number of bits of information. The memory controller programs the storage cells of the storage cell group using threshold voltage levels from a second number of threshold voltage levels, wherein the second number of threshold voltage levels is less than the first number of threshold voltage levels and comprises a lowest of the first number of threshold voltage levels.
Public/Granted literature
- US20180040367A1 APPARATUS AND METHOD FOR ENDURANCE FRIENDLY PROGRAMMING USING LOWER VOLTAGE THRESHOLDS Public/Granted day:2018-02-08
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