Invention Grant
- Patent Title: Semiconductor device and method of forming a fan-out PoP device with PWB vertical interconnect units
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Application No.: US14061244Application Date: 2013-10-23
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Publication No.: US10049964B2Publication Date: 2018-08-14
- Inventor: Il Kwon Shim , Yaojian Lin , Pandi C. Marimuthu , Kang Chen , Yu Gu
- Applicant: STATS ChipPAC, Ltd.
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC Pte. Ltd.
- Current Assignee: STATS ChipPAC Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agency: Patent Law Group: Atkins and Associates, P.C.
- Agent Robert D. Atkins
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/498 ; H01L23/48 ; H01L23/31 ; H01L21/56 ; H01L25/10 ; H01L25/00 ; H01L23/538

Abstract:
A semiconductor device has a semiconductor package and an interposer disposed over the semiconductor package. The semiconductor package has a first semiconductor die and a modular interconnect unit disposed in a peripheral region around the first semiconductor die. A second semiconductor die is disposed over the interposer opposite the semiconductor package. An interconnect structure is formed between the interposer and the modular interconnect unit. The interconnect structure is a conductive pillar or stud bump. The modular interconnect unit has a core substrate and a plurality of vertical interconnects formed through the core substrate. A build-up interconnect structure is formed over the first semiconductor die and modular interconnect unit. The vertical interconnects of the modular interconnect unit are exposed by laser direct ablation. An underfill is deposited between the interposer and semiconductor package. A total thickness of the semiconductor package and build-up interconnect structure is less than 0.4 millimeters.
Public/Granted literature
- US20140048906A1 Semiconductor Device and Method of Forming a Fan-Out PoP Device with PWB Vertical Interconnect Units Public/Granted day:2014-02-20
Information query
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