公开(公告)号：US10453785B2

公开(公告)日：2019-10-22

申请号：US14814906

申请日：2015-07-31

申请人： STATS ChipPAC, Ltd.

发明人： Il Kwon Shim ,  Pandi C. Marimuthu ,  Won Kyoung Choi ,  Sze Ping Goh ,  Jose A. Caparas

IPC分类号： H01L23/498 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00 ,  H01L25/10 ,  H01L23/538

摘要： A semiconductor device comprises a first semiconductor package including a conductive layer. A substrate including an interconnect structure is disposed over the conductive layer. The interconnect structure of the substrate with the conductive layer of the first semiconductor package are self-aligned. A plurality of openings is formed in the substrate. An adhesive is disposed between the substrate and the first semiconductor package and in the openings of the substrate. A redistribution layer (RDL) is formed over the first semiconductor package opposite the substrate. A pitch of the substrate is different from a pitch of the RDL. The adhesive extends to the interconnect structure of the substrate. A second semiconductor package is disposed over the substrate and the first semiconductor package.

公开(公告)号：US09559039B2

公开(公告)日：2017-01-31

申请号：US13800807

申请日：2013-03-13

申请人： STATS ChipPAC, Ltd.

发明人： Il Kwon Shim ,  Jun Mo Koo ,  Pandi C. Marimuthu ,  Yaojian Lin ,  See Chian Lim

IPC分类号： H01L23/48 ,  H01L21/48 ,  H01L23/498 ,  H01L23/538 ,  H01L23/00 ,  H01L25/10 ,  H01L25/00 ,  H01L21/56 ,  H01L23/31

CPC分类号： H01L23/5384 ,  H01L21/486 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/3171 ,  H01L23/3192 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/11 ,  H01L24/13 ,  H01L24/19 ,  H01L24/20 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/96 ,  H01L24/97 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/12105 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/9222 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/0652 ,  H01L2225/06568 ,  H01L2225/06572 ,  H01L2225/1035 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/01082 ,  H01L2224/03 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device has a substrate including a base and a plurality of conductive posts extending from the base. The substrate can be a wafer-shape, panel, or singulated form. The conductive posts can have a circular, rectangular, tapered, or narrowing intermediate shape. A semiconductor die is disposed through an opening in the base between the conductive posts. The semiconductor die extends above the conductive posts or is disposed below the conductive posts. An encapsulant is deposited over the semiconductor die and around the conductive posts. The base and a portion of the encapsulant is removed to electrically isolate the conductive posts. An interconnect structure is formed over the semiconductor die, encapsulant, and conductive posts. An insulating layer is formed over the semiconductor die, encapsulant, and conductive posts. A semiconductor package is disposed over the semiconductor die and electrically connected to the conductive posts.

摘要翻译： 半导体器件具有包括基底和从基底延伸的多个导电柱的基底。 衬底可以是晶片形状，面板或单体形式。 导电柱可以具有圆形，矩形，锥形或变窄的中间形状。 通过导电柱之间的底座中的开口设置半导体管芯。 半导体管芯延伸到导电柱之上，或者设置在导电柱的下方。 密封剂沉积在半导体管芯上并且在导电柱周围。 去除基底和一部分密封剂以电绝缘导电柱。 在半导体管芯，密封剂和导电柱上形成互连结构。 在半导体管芯，密封剂和导电柱上形成绝缘层。 半导体封装设置在半导体管芯上并电连接到导电柱。

公开(公告)号：US20160214857A1

公开(公告)日：2016-07-28

申请号：US15008347

申请日：2016-01-27

申请人： STATS ChipPAC, Ltd.

发明人： Yaojian Lin ,  Il Kwon Shim

IPC分类号： B81B7/00 ,  B81C1/00

CPC分类号： B81B7/007 ,  B81B2201/0257 ,  B81B2207/012 ,  B81B2207/096 ,  H01L2224/48091 ,  H01L2924/15151 ,  H01L2924/00014

摘要： A microelectromechanical system (MEMS) semiconductor device has a first and second semiconductor die. A first semiconductor die is embedded within an encapsulant together with a modular interconnect unit. Alternatively, the first semiconductor die is embedded within a substrate. A second semiconductor die, such as a MEMS die, is disposed over the first semiconductor die and electrically connected to the first semiconductor die through an interconnect structure. In another embodiment, the first semiconductor die is flip chip mounted to the substrate, and the second semiconductor die is wire bonded to the substrate adjacent to the first semiconductor die. In another embodiment, first and second semiconductor die are embedded in an encapsulant and are electrically connected through a build-up interconnect structure. A lid is disposed over the semiconductor die. In a MEMS microphone embodiment, the lid, substrate, or interconnect structure includes an opening over a surface of the MEMS die.

摘要翻译： 微机电系统（MEMS）半导体器件具有第一和第二半导体管芯。 第一半导体管芯与模块化互连单元一起嵌入密封剂内。 或者，第一半导体管芯被嵌入到衬底内。 第二半导体管芯，例如MEMS管芯，设置在第一半导体管芯上，并通过互连结构电连接到第一半导体管芯。 在另一个实施例中，第一半导体管芯是倒装芯片安装到衬底，并且第二半导体管芯与第一半导体管芯相邻的衬底引线接合。 在另一个实施例中，第一和第二半导体管芯被嵌入密封剂中并通过堆积互连结构电连接。 盖子设置在半导体管芯上。 在MEMS麦克风实施例中，盖，基板或互连结构包括在MEMS管芯的表面上的开口。

公开(公告)号：US09305854B2

公开(公告)日：2016-04-05

申请号：US13795679

申请日：2013-03-12

申请人： STATS ChipPAC, Ltd.

发明人： Il Kwon Shim ,  Jun Mo Koo

IPC分类号： H01L23/48 ,  H01L23/28 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00 ,  H01L21/48 ,  H01L23/532 ,  H01L23/538 ,  H01L23/525

CPC分类号： H01L23/28 ,  H01L21/4853 ,  H01L21/56 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/525 ,  H01L23/5328 ,  H01L23/5389 ,  H01L24/03 ,  H01L24/11 ,  H01L24/19 ,  H01L24/96 ,  H01L2224/02311 ,  H01L2224/0239 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/1134 ,  H01L2224/12105 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00012

摘要： A semiconductor device has a semiconductor die and first insulating layer formed over the semiconductor die. A patterned trench is formed in the first insulating layer. A conductive ink is deposited in the patterned trench by disposing a stencil over the first insulating layer with an opening aligned with the patterned trench and depositing the conductive ink through the opening in the stencil into the patterned trench.Alternatively, the conductive ink is deposited by dispensing the conductive ink through a nozzle into the patterned trench. The conductive ink is cured by ultraviolet light at room temperature. A second insulating layer is formed over the first insulating layer and conductive ink. An interconnect structure is formed over the conductive ink. An encapsulant can be deposited around the semiconductor die. The patterned trench is formed in the encapsulant and the conductive ink is deposited in the patterned trench in the encapsulant.

摘要翻译： 半导体器件具有形成在半导体管芯上的半导体管芯和第一绝缘层。 图案化的沟槽形成在第一绝缘层中。 通过将第一绝缘层上的模版设置在与图案化的沟槽对准的开口并将导电油墨沉积在模板中的开口中，将导电油墨沉积在图案化的沟槽中，形成图案化沟槽。 或者，通过将导电油墨通过喷嘴分配到图案化的沟槽中来沉积导电油墨。 导电油墨在室温下通过紫外光固化。 在第一绝缘层和导电油墨之上形成第二绝缘层。 在导电油墨上形成互连结构。 密封剂可以沉积在半导体管芯周围。 图案化的沟槽形成在密封剂中，并且导电油墨沉积在密封剂中的图案化沟槽中。

公开(公告)号：US20160043047A1

公开(公告)日：2016-02-11

申请号：US14814906

申请日：2015-07-31

申请人： STATS ChipPAC, Ltd.

发明人： Il Kwon Shim ,  Pandi C. Marimuthu ,  Won Kyoung Choi ,  Sze Ping Goh ,  Jose A. Caparas

IPC分类号： H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L21/56

CPC分类号： H01L23/49838 ,  H01L21/56 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/3178 ,  H01L23/49816 ,  H01L23/5385 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/96 ,  H01L24/97 ,  H01L25/105 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/24155 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/13091 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/18162 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/014

摘要： A semiconductor device comprises a first semiconductor package including a conductive layer. A substrate including an interconnect structure is disposed over the conductive layer. The interconnect structure of the substrate with the conductive layer of the first semiconductor package are self-aligned. A plurality of openings is formed in the substrate. An adhesive is disposed between the substrate and the first semiconductor package and in the openings of the substrate. A redistribution layer (RDL) is formed over the first semiconductor package opposite the substrate. A pitch of the substrate is different from a pitch of the RDL. The adhesive extends to the interconnect structure of the substrate. A second semiconductor package is disposed over the substrate and the first semiconductor package.

摘要翻译： 半导体器件包括包括导电层的第一半导体封装。 包括互连结构的衬底设置在导电层上。 具有第一半导体封装的导电层的衬底的互连结构是自对准的。 在基板上形成多个开口。 粘合剂设置在基板和第一半导体封装之间以及基板的开口中。 在与衬底相对的第一半导体封装件上方形成再分配层（RDL）。 衬底的间距与RDL的间距不同。 粘合剂延伸到基底的互连结构。 第二半导体封装设置在衬底和第一半导体封装之上。

公开(公告)号：US20140127858A1

公开(公告)日：2014-05-08

申请号：US14154049

申请日：2014-01-13

申请人： STATS ChipPAC, Ltd.

发明人： Il Kwon Shim ,  Seng Guan Chow ,  Heap Hoe Kuan

IPC分类号： H01L21/56

CPC分类号： H01L21/561 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/48 ,  H01L24/97 ,  H01L25/105 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/97 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： An embedded semiconductor die package is made by mounting a frame carrier to a temporary carrier with an adhesive. The frame carrier includes die mounting sites each including a leadframe interconnect structure around a cavity. A semiconductor die is disposed in each cavity. An encapsulant is deposited in the cavity over the die. A package interconnect structure is formed over the leadframe interconnect structure and encapsulant. The package interconnect structure and leadframe interconnect structure are electrically connected to the die. The frame carrier is singulated into individual embedded die packages. The semiconductor die can be vertically stacked or placed side-by-side within the cavity. The embedded die packages can be stacked and electrically interconnected through the leadframe interconnect structure. A semiconductor device can be mounted to the embedded die package and electrically connected to the die through the leadframe interconnect structure.

摘要翻译： 嵌入式半导体管芯封装通过使用粘合剂将框架载体安装到临时载体上而制成。 框架载体包括每个包括围绕腔的引线框架互连结构的管芯安装位置。 半导体管芯设置在每个腔中。 将密封剂沉积在模具上的空腔中。 封装互连结构形成在引线框架互连结构和密封剂上。 封装互连结构和引线框互连结构电连接到管芯。 帧载体被分成单独的嵌入式芯片封装。 半导体管芯可以垂直堆叠或并排放置在腔内。 嵌入式管芯封装可以通过引线框互连结构堆叠并电互连。 半导体器件可以安装到嵌入式裸片封装并且通过引线框互连结构电连接到裸片。

公开(公告)号：US20140103509A1

公开(公告)日：2014-04-17

申请号：US13653242

申请日：2012-10-16

申请人： STATS CHIPPAC, LTD.

发明人： Insang Yoon ,  Flynn Carson ,  Il Kwon Shim ,  SeongHun Mun

IPC分类号： H01L23/495 ,  H01L21/98 ,  H01L21/60

CPC分类号： H01L23/49816 ,  H01L21/568 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/49894 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2225/0651 ,  H01L2225/06565 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/11 ,  H01L2224/73204 ,  H01L2224/16225 ,  H01L2924/00012 ,  H01L2224/19

摘要： A semiconductor device has a semiconductor die with an encapsulant deposited over and around the semiconductor die. An opening is formed in a first surface of the encapsulant by etching or LDA. A plurality of bumps is optionally formed over the semiconductor die. A bump is recessed within the opening of the encapsulant. A conductive ink is formed over the first surface of the encapsulant, bump and sidewall of the opening. The conductive ink can be applied by a printing process. An interconnect structure is formed over a second surface of the encapsulant opposite the first surface of the encapsulant. The interconnect structure is electrically connected to the semiconductor die. A semiconductor package is disposed over the first surface of the encapsulant with a plurality of bumps electrically connected to the conductive ink layer. The semiconductor package may contain a memory device.

摘要翻译： 半导体器件具有沉积在半导体管芯上方和周围的具有密封剂的半导体管芯。 通过蚀刻或LDA在密封剂的第一表面中形成开口。 可选地，在半导体管芯上形成多个凸块。 凹凸凹陷在密封剂的开口内。 导电油墨形成在开口的密封剂，凸起和侧壁的第一表面上。 导电油墨可以通过印刷方法施加。 在密封剂的与密封剂的第一表面相对的第二表面上形成互连结构。 互连结构电连接到半导体管芯。 半导体封装设置在密封剂的第一表面上，多个凸块电连接到导电油墨层。 半导体封装可以包含存储器件。

公开(公告)号：US09754897B2

公开(公告)日：2017-09-05

申请号：US14721677

申请日：2015-05-26

申请人： STATS ChipPAC, Ltd.

发明人： Yaojian Lin ,  Byung Joon Han ,  Rajendra D. Pendse ,  Il Kwon Shim ,  Pandi C. Marimuthu ,  Won Kyoung Choi ,  Linda Pei Ee Chua

IPC分类号： H04L23/00 ,  H01L23/552 ,  H01L21/56 ,  H01L23/538 ,  H01L23/00 ,  H01L21/683 ,  H01L23/498

CPC分类号： H01L23/552 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6836 ,  H01L23/49816 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/96 ,  H01L24/97 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/24137 ,  H01L2224/24195 ,  H01L2224/73267 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/13091 ,  H01L2924/1815 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2224/03 ,  H01L2224/82 ,  H01L2924/00

摘要： A semiconductor device has a first component. A modular interconnect structure is disposed adjacent to the first component. A first interconnect structure is formed over the first component and modular interconnect structure. A shielding layer is formed over the first component, modular interconnect structure, and first interconnect structure. The shielding layer provides protection for the enclosed semiconductor devices against EMI, RFI, or other inter-device interference, whether generated internally or from external semiconductor devices. The shielding layer is electrically connected to an external low-impedance ground point. A second component is disposed adjacent to the first component. The second component includes a passive device. An LC circuit includes the first component and second component. A semiconductor die is disposed adjacent to the first component. A conductive adhesive is disposed over the modular interconnect structure. The modular interconnect structure includes a height less than a height of the first component.

公开(公告)号：US09704824B2

公开(公告)日：2017-07-11

申请号：US14070509

申请日：2013-11-02

申请人： STATS ChipPAC, Ltd.

发明人： Yaojian Lin ,  Pandi C. Marimuthu ,  Il Kwon Shim ,  Byung Joon Han

IPC分类号： H01L23/00 ,  H01L21/56 ,  H01L23/31

CPC分类号： H01L24/96 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3114 ,  H01L24/11 ,  H01L24/19 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/1134 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2924/01322 ,  H01L2924/10157 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device includes a semiconductor die and an encapsulant deposited over and around the semiconductor die. A semiconductor wafer includes a plurality of semiconductor die and a base semiconductor material. A groove is formed in the base semiconductor material. The semiconductor wafer is singulated through the groove to separate the semiconductor die. The semiconductor die are disposed over a carrier with a distance of 500 micrometers (μm) or less between semiconductor die. The encapsulant covers a sidewall of the semiconductor die. A fan-in interconnect structure is formed over the semiconductor die while the encapsulant remains devoid of the fan-in interconnect structure. A portion of the encapsulant is removed from a non-active surface of the semiconductor die. The device is singulated through the encapsulant while leaving encapsulant disposed covering a sidewall of the semiconductor die. The encapsulant covering the sidewall includes a thickness of 50 μm or less.

公开(公告)号：US09704780B2

公开(公告)日：2017-07-11

申请号：US14038575

申请日：2013-09-26

申请人： STATS ChipPAC, Ltd.

发明人： Pandi C. Marimuthu ,  Il Kwon Shim ,  Yaojian Lin ,  Won Kyoung Choi

IPC分类号： H01L21/00 ,  H01L23/48 ,  H01L23/00 ,  H01L23/498 ,  H01L25/065 ,  H01L21/56 ,  H01L23/538

CPC分类号： H01L23/481 ,  H01L21/568 ,  H01L23/49833 ,  H01L23/5389 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/94 ,  H01L24/96 ,  H01L25/0657 ,  H01L2224/03 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/12105 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/73267 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00

摘要： A semiconductor device includes a semiconductor die. A first interconnect structure is disposed over a peripheral region of the semiconductor die. A semiconductor component is disposed over the semiconductor die. The semiconductor component includes a second interconnect structure. The semiconductor component is disposed over the semiconductor die to align the second interconnect structure with the first interconnect structure. The first interconnect structure includes a plurality of interconnection units disposed around first and second adjacent sides of the semiconductor die to form an L-shape border of the interconnection units around the semiconductor die. A third interconnect structure is formed over the semiconductor die perpendicular to the first interconnect structure. An insulating layer is formed over the semiconductor die and first interconnect structure. A plurality of vias is formed through the insulating layer and into the first interconnect structure with the second interconnect structure disposed within the vias.