Invention Grant
- Patent Title: Using the least significant bits of a called function's address to switch processor modes
-
Application No.: US13655499Application Date: 2012-10-19
-
Publication No.: US10055227B2Publication Date: 2018-08-21
- Inventor: Charles Joseph Tabony , Erich James Plondke , Lucian Codrescu , Suresh K. Venkumahanti , Evandro Carlos Menezes
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Muncy, Geissler, Olds & Lowe, P.C.
- Main IPC: G06F9/30
- IPC: G06F9/30 ; G06F9/38 ; G06F9/32

Abstract:
Systems and methods for tracking and switching between execution modes in processing systems. A processing system is configured to execute instructions in at least two instruction execution triodes including a first and second execution mode chosen from a classic/aligned mode and a compressed/unaligned mode. Target addresses of selected instructions such as calls and returns are forcibly misaligned in the compressed mode, such one or more bits, such as, the least significant bits (alignment bits) of the target address in the compressed mode are different from the corresponding alignment bits in the classic mode. When the selected instructions are encountered during execution in the first mode, a decision to switch operation to the second mode is based on analyzing the alignment bits of the target address of the selected instruction.
Public/Granted literature
- US20130205115A1 USING THE LEAST SIGNIFICANT BITS OF A CALLED FUNCTION'S ADDRESS TO SWITCH PROCESSOR MODES Public/Granted day:2013-08-08
Information query