Invention Grant
- Patent Title: Enhancement mode field-effect transistor with a gate dielectric layer recessed on a composite barrier layer for high static performance
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Application No.: US15215625Application Date: 2016-07-21
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Publication No.: US10068976B2Publication Date: 2018-09-04
- Inventor: Chia-Ling Yeh , Man-Ho Kwan , Kuei-Ming Chen , Jiun-Lei Jerry Yu , Chun Lin Tsai
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Potashnik, LLC
- Main IPC: H01L29/15
- IPC: H01L29/15 ; H01L29/40 ; H01L29/20 ; H01L29/205 ; H01L29/778 ; H01L29/66 ; H01L27/06 ; H01L21/8252

Abstract:
An enhancement mode field-effect transistor (E-FET) for high static performance is provided. A composite barrier layer comprises a lower barrier layer and an upper barrier layer. The upper barrier layer is arranged over the lower barrier layer and has a different polarization than the lower barrier layer. Further, the composite barrier layer comprises a gate opening. A channel layer is arranged under the composite barrier layer, such that a heterojunction is defined at an interface between the channel layer and the composite barrier layer. A gate dielectric layer is arranged over the composite barrier layer and within the gate opening. A gate electrode is arranged over the gate dielectric layer. A method for manufacturing the E-FET is also provided.
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