Invention Grant
- Patent Title: Method and system for testing circuit
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Application No.: US14868566Application Date: 2015-09-29
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Publication No.: US10073506B2Publication Date: 2018-09-11
- Inventor: Jianhong Zeng , Ziying Zhou , Haoyi Ye , Peiqing Hu
- Applicant: DELTA ELECTRONICS, INC.
- Applicant Address: CN Taoyuan Hsien, Taiwan
- Assignee: DELTA ELECTRONICS, INC.
- Current Assignee: DELTA ELECTRONICS, INC.
- Current Assignee Address: CN Taoyuan Hsien, Taiwan
- Agent Yunling Ren
- Priority: CN201510001617 20150104
- Main IPC: G01R31/20
- IPC: G01R31/20 ; G01R31/26 ; G06F1/26 ; G01R31/40 ; G06F1/28 ; G01R19/165

Abstract:
The present disclosure generally relates to a test method and system thereof. The test method comprises: outputting a test control signal to a test power supply of the circuit under test so as to adjust an input signal of the circuit under test so that a gain range of the circuit under test in an abnormal operating state is the same as that of the circuit under test in a normal operating state when the circuit under test enters into the abnormal operating state. The present disclosure may meet requirements for equipment test without sacrificing the efficiency of circuits in normal operating state or adding complexity circuit.
Public/Granted literature
- US20160195580A1 TEST METHOD AND SYSTEM THEREOF Public/Granted day:2016-07-07
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