A circuit for calculating power consumption of a phase change memory (PCM) device may be provided. The circuit may include a plurality of pipelines and an arithmetic logic circuit. The plurality of pipelines may be configured to correspond to a plurality of write periods exhibiting different power consumption values during a write operation of the PCM device executed by a write command. The plurality of pipelines may shift or transmit data in synchronization with a clock signal. The arithmetic logic circuit may be configured to perform an adding operation of all of deviations of the power consumption values at a point of time that data transmission between at least two of the plurality of pipelines occurs, to thus generate a total power consumption value.