Invention Grant
- Patent Title: Display device
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Application No.: US15830061Application Date: 2017-12-04
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Publication No.: US10089949B2Publication Date: 2018-10-02
- Inventor: Hiroyuki Abe , Masahiro Maki , Hideo Sato , Hiroaki Komatsu
- Applicant: Japan Display Inc.
- Applicant Address: JP Tokyo
- Assignee: Japan Display Inc.
- Current Assignee: Japan Display Inc.
- Current Assignee Address: JP Tokyo
- Agency: TYPHA IP LLC
- Priority: JP2011-013512 20110125
- Main IPC: G09G3/36
- IPC: G09G3/36 ; G09G3/00

Abstract:
A gate signal line driving circuit includes plural basic circuits, each outputting to a gate signal line a gate signal which is high during a high signal period and low during a low signal period. Each of the basic circuits includes: agate line high voltage application circuit which is turned on in accordance with the high signal period to apply the high voltage to the gate signal line; a gate line low voltage application circuit which is turned on in accordance with the low signal period t apply the low voltage to the gate signal line; and a second gate line low voltage application circuit which is turned on to apply the low voltage to the gate signal line in at least a part of a period between turning off the gate line high voltage application circuit and turning on the gate line low voltage application circuit.
Public/Granted literature
- US20180102103A1 DISPLAY DEVICE Public/Granted day:2018-04-12
Information query
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