Invention Grant
- Patent Title: Semiconductor device including memory cell array and power supply region
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Application No.: US15616633Application Date: 2017-06-07
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Publication No.: US10096608B2Publication Date: 2018-10-09
- Inventor: Masao Morimoto , Noriaki Maeda , Yasuhisa Shimazaki
- Applicant: Renesas Electronics Corporation
- Applicant Address: unknown Tokyo
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: unknown Tokyo
- Agency: Shapiro, Gabor and Rosenberger, PLLC
- Priority: JP2011-162953 20110726
- Main IPC: H01L27/092
- IPC: H01L27/092 ; H01L27/11 ; H01L27/02 ; G11C11/412 ; H01L23/528 ; G06F17/50

Abstract:
A semiconductor device having an SRAM which includes: a monolithic first active region in which a first transistor and a fifth transistor are disposed; a second active region separated from the first active region, in which a second transistor is disposed; a monolithic third active region in which a third transistor and a sixth transistor are disposed; and a fourth active region separated from the third active region, in which a fourth transistor is disposed. Each driver transistor is divided into a first transistor and a second transistor (or a third transistor and a fourth transistor) and these driver transistors are disposed over different active regions.
Public/Granted literature
- US20170271344A1 SEMICONDUCTOR DEVICE INCLUDING MEMORY CELL ARRAY AND POWER SUPPLY REGION Public/Granted day:2017-09-21
Information query
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