Invention Grant
- Patent Title: Semiconductor device and manufacturing method thereof
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Application No.: US15652389Application Date: 2017-07-18
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Publication No.: US10096676B2Publication Date: 2018-10-09
- Inventor: Hisao Inomata
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McGinn IP Law Group, PLLC.
- Priority: JP2016-179281 20160914
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/10 ; H01L21/04 ; H01L21/265 ; H01L21/28 ; H01L21/3215 ; H01L21/3205 ; H01L29/16 ; H01L29/20 ; H01L21/266 ; H01L29/808

Abstract:
A semiconductor device includes: a first-conductivity-type semiconductor substrate serving as a drain layer; a first-conductivity-type epitaxial layer formed on the semiconductor substrate; a first-conductivity-type source layer formed in a surface part of the epitaxial layer; two second-conductivity-type gate layers formed in the surface part of the epitaxial layer so as to sandwich the source layer; a first-conductivity-type channel forming layer formed so as to be sandwiched between the two gate layers, the first-conductivity-type channel forming layer being formed on an inner side of the source layer in the epitaxial layer; and an electrode connected to one of the drain layer, the source layer, and the gate layer. In the channel forming layer, two first-conductivity-type impurity layers each having a substantially predetermined width are formed adjacent to each other in a direction crossing a channel.
Public/Granted literature
- US20180076286A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Public/Granted day:2018-03-15
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