Invention Grant
- Patent Title: Multiplexer structure
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Application No.: US15361594Application Date: 2016-11-28
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Publication No.: US10103721B2Publication Date: 2018-10-16
- Inventor: Albert Martinez , Michel Agoyan
- Applicant: STMicroelectronics (Rousset) SAS
- Applicant Address: FR Rousset
- Assignee: STMicroelectronics (Rousset) SAS
- Current Assignee: STMicroelectronics (Rousset) SAS
- Current Assignee Address: FR Rousset
- Agency: Crowe & Dunlevy
- Priority: FR1654080 20160504
- Main IPC: H03K17/00
- IPC: H03K17/00 ; H03K5/159 ; H03K19/003 ; G06F7/58 ; H03K3/84 ; H03K19/173

Abstract:
A logic two-to-one multiplexer includes: two input terminals; one output terminal; a control terminal. Four series-connected two-to-one multiplexers are connected such that a first multiplexer has its inputs connected to the input terminals, a last multiplexer has its output connected to the output terminal, and the other multiplexers have their respective inputs interconnected to the output of the previous multiplexer in the series association. Half of the multiplexers are controlled in reverse with respect to the other half of the multiplexers.
Public/Granted literature
- US20170324405A1 MULTIPLEXER STRUCTURE Public/Granted day:2017-11-09
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