Invention Grant
- Patent Title: Hybrid substrate engineering in CMOS finFET integration for mobility improvement
-
Application No.: US15202940Application Date: 2016-07-06
-
Publication No.: US10177167B2Publication Date: 2019-01-08
- Inventor: Chia-Yu Chen , Bruce B. Doris , Hong He , Rajasekhar Venigalla
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Tutunjian & Bitetto, P.C.
- Agent Vazken Alexanian
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L27/12 ; H01L29/78 ; H01L27/092 ; H01L21/8238 ; H01L21/84 ; H01L21/02 ; H01L29/04 ; H01L29/165 ; H01L29/06 ; H01L29/08 ; H01L29/161 ; H01L21/308

Abstract:
A method for forming a hybrid complementary metal oxide semiconductor (CMOS) device includes orienting a semiconductor layer of a semiconductor-on-insulator (SOI) substrate with a base substrate of the SOI, exposing the base substrate in an N-well region by etching through a mask layer, a dielectric layer, the semiconductor layer and a buried dielectric to form a trench and forming spacers on sidewalls of the trench. The base substrate is epitaxially grown from a bottom of the trench to form an extended region. A fin material is epitaxially grown from the extended region within the trench. The mask layer and the dielectric layer are restored over the trench. P-type field-effect transistor (PFET) fins are etched on the base substrate, and N-type field-effect transistor (NFET) fins are etched in the semiconductor layer.
Public/Granted literature
- US20170047331A1 HYBRID SUBSTRATE ENGINEERING IN CMOS FINFET INTEGRATION FOR MOBILITY IMPROVEMENT Public/Granted day:2017-02-16
Information query
IPC分类: