Invention Grant
- Patent Title: Integrated clock gate circuit with embedded NOR
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Application No.: US15244839Application Date: 2016-08-23
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Publication No.: US10177765B2Publication Date: 2019-01-08
- Inventor: Steven K. Hsu , Amit Agarwal , Iqbal R. Rajwani , Simeon Realov , Ram K. Krishnamurthy
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Green, Howard & Mughal LLP
- Main IPC: H03K19/00
- IPC: H03K19/00 ; H03K19/0944 ; H03K19/20

Abstract:
An apparatus is provided which comprises: a clock node; a test node; an enable node; and an AND-OR-INVERT (AOI) static latch coupled to the clock node, test node, and enable node, wherein the AOI static latch has embedded NOR functionality. Another apparatus comprises: a critical timing path having a pass-gate based integrated clock gate; and a non-critical timing path electrically coupled to the critical timing path, wherein the non-critical timing path includes an AND-OR-Inverter (AOI) based integrated clock gate with embedded NOR functionality.
Public/Granted literature
- US20180062658A1 INTEGRATED CLOCK GATE CIRCUIT WITH EMBEDDED NOR Public/Granted day:2018-03-01
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