A thin film transistor array includes a substrate, a gate electrode formed on the substrate, a gate insulation film covering the gate electrode, a source electrode formed on the gate insulation film, a drain electrode formed on the gate insulation film, a semiconductor layer connected to the source electrode and the drain electrode, an interlayer insulation film formed on the drain electrode and the semiconductor layer, and a pixel electrode formed on the interlayer insulation film. The interlayer insulation film has a via hole that reaches a portion of the drain electrode, and the drain electrode has a liquid repellent coating on the portion positioned in the via hole.