公开(公告)号：US10312375B2

公开(公告)日：2019-06-04

申请号：US15714393

申请日：2017-09-25

Applicant: TOPPAN PRINTING CO., LTD.

Inventor： Noriaki Ikeda ,  Makoto Nishizawa

IPC: G02F1/136 ,  H01L29/417 ,  H01L21/283 ,  H01L29/786 ,  H01L21/28 ,  H01L23/532 ,  H01L21/768 ,  H01L27/12 ,  H01L29/66 ,  H01L27/32 ,  H01L51/05

Abstract: A thin-film transistor including an insulative substrate, a gate electrode formed on the insulative substrate, a gate insulating layer formed on the substrate and the gate electrode, a source electrode and a drain electrode forming on the gate insulating layer and spaced from each other, a semiconductor layer formed on the gate insulating layer and connected to the source electrode and the drain electrode, a semiconductor protective layer formed on the semiconductor layer, an interlayer insulating film formed on the source electrode, the drain electrode and the semiconductor protective layer, the interlayer insulating film including a fluorine compound, and an upper electrode formed on the interlayer insulating film.

公开(公告)号：US10243157B2

公开(公告)日：2019-03-26

申请号：US15080924

申请日：2016-03-25

Applicant: TOPPAN PRINTING CO., LTD.

Inventor： Minoru Kumagai ,  Noriaki Ikeda

IPC: H01L51/05 ,  H01L27/32 ,  H01L51/10 ,  H01L51/00 ,  H01L27/12 ,  G02F1/1368 ,  G02F1/167 ,  H01L27/28

Abstract: A thin film transistor array includes a substrate, a gate electrode formed on the substrate, a gate insulation film covering the gate electrode, a source electrode formed on the gate insulation film, a drain electrode formed on the gate insulation film, a semiconductor layer connected to the source electrode and the drain electrode, an interlayer insulation film formed on the drain electrode and the semiconductor layer, and a pixel electrode formed on the interlayer insulation film. The interlayer insulation film has a via hole that reaches a portion of the drain electrode, and the drain electrode has a liquid repellent coating on the portion positioned in the via hole.

公开(公告)号：US11302880B2

公开(公告)日：2022-04-12

申请号：US16283666

申请日：2019-02-22

Applicant: TOPPAN PRINTING CO., LTD.

Inventor： Noriaki Ikeda ,  Makoto Nishizawa

IPC: H01L29/786 ,  G09F9/30 ,  H01L21/28 ,  H01L29/417 ,  H01L29/423 ,  H01L29/49 ,  H01L27/32 ,  H01L51/10 ,  H01L51/05

Abstract: An organic thin-film transistor includes an insulating substrate, a capacitor electrode formed on the insulating substrate, a first insulating layer covering the capacitor electrode, a gate electrode formed on the first insulating layer, a second insulating layer covering the gate electrode and the capacitor electrode, a source electrode formed on the second insulating layer, a drain electrode formed on the second insulating layer, and a semiconductor layer formed on the second insulating layer in a portion between the source electrode and the drain electrode and including an organic semiconductor material.

公开(公告)号：US20130056738A1

公开(公告)日：2013-03-07

申请号：US13629075

申请日：2012-09-27

Applicant: Toppan Printing Co., Ltd.

Inventor： Noriaki Ikeda ,  Chihiro Imamura ,  Manabu Ito

IPC: H01L33/08

CPC classification number: H01L27/1225 ,  G02F1/1368 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/66765

Abstract: A method for manufacturing a thin film transistor includes a first process of forming a gate electrode on a substrate; a second process of forming a gate insulation film so as to cover the gate electrode; a third process of forming a source electrode and a drain electrode on the gate insulation film; a fourth process of forming a semiconductor layer connected to the source electrode and the drain electrode; a fifth process of forming a protection film so as to overlap a portion of the source electrode and the drain electrode immediately above the semiconductor layer; and a sixth process of patterning the semiconductor layer using the protection film as a mask.

Abstract translation: 制造薄膜晶体管的方法包括：在基板上形成栅电极的第一工序; 形成栅极绝缘膜以覆盖栅电极的第二工序; 在栅极绝缘膜上形成源电极和漏电极的第三工序; 形成连接到源电极和漏电极的半导体层的第四工序; 形成保护膜以使与半导体层正上方的源电极和漏电极的一部分重叠的第五工序; 以及使用保护膜作为掩模来图案化半导体层的第六工艺。