Invention Grant
- Patent Title: Within-array through-memory-level via structures and method of making thereof
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Application No.: US15176674Application Date: 2016-06-08
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Publication No.: US10249640B2Publication Date: 2019-04-02
- Inventor: Jixin Yu , Zhenyu Lu , Alexander Chu , Kensuke Yamaguchi , Hiroyuki Ogawa , Daxin Mao , Yan LI , Johann Alsmeier
- Applicant: SANDISK TECHNOLOGIES LLC
- Applicant Address: US TX Addison
- Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee Address: US TX Addison
- Agency: The Marbury Law Group PLLC
- Main IPC: H01L27/11582
- IPC: H01L27/11582 ; H01L27/11573 ; H01L23/522 ; H01L23/528 ; H01L27/11565 ; H01L27/1157 ; H01L27/11575

Abstract:
A semiconductor structure includes a memory-level assembly located over a substrate and including at least one alternating stack and memory stack structures vertically extending through the at least one alternating stack. Each of the at least one an alternating stack includes alternating layers of respective insulating layers and respective electrically conductive layers, and each of the electrically conductive layers in the at least one alternating stack includes a respective opening such that a periphery of a respective spacer dielectric portion located in the opening contacts a sidewall of the respective electrically conductive layers. At least one through-memory-level via structure vertically extends through each of the spacer dielectric portions and the insulating layers.
Public/Granted literature
- US20170358593A1 WITHIN-ARRAY THROUGH-MEMORY-LEVEL VIA STRUCTURES AND METHOD OF MAKING THEREOF Public/Granted day:2017-12-14
Information query
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