Invention Grant
- Patent Title: Method for creating the high voltage complementary BJT with lateral collector on bulk substrate with resurf effect
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Application No.: US15647493Application Date: 2017-07-12
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Publication No.: US10269895B2Publication Date: 2019-04-23
- Inventor: Jeffrey A. Babcock , Alexei Sadovnikov
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Jacqueline J. Garner; Charles A. Brill; Frank D. Cimino
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/06 ; H01L27/082 ; H01L29/04 ; H01L29/16 ; H01L21/265 ; H01L21/762 ; H01L21/306 ; H01L21/308 ; H01L29/08 ; H01L21/8228 ; H01L29/10 ; H01L29/732 ; H01L21/266

Abstract:
Complementary high-voltage bipolar transistors formed in standard bulk silicon integrated circuits are disclosed. In one disclosed embodiment, collector regions are formed in an epitaxial silicon layer. Base regions and emitters are disposed over the collector region. An n-type region is formed under collector region by implanting donor impurities into a p-substrate for the PNP transistor and implanting acceptor impurities into the p-substrate for the NPN transistor prior to depositing the collector epitaxial regions. Later in the process flow these n-type and p-type regions are connected to the top of the die by a deep n+ and p+ wells respectively. The n-type well is then coupled to VCC while the p-type well is coupled to GND, providing laterally depleted portions of the PNP and NPN collector regions and hence, increasing their BVs.
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