One illustrative method disclosed includes, among other things, forming a gate structure around a fin and above a layer of insulating material, forming a gate spacer adjacent the gate structure and a fin spacer positioned adjacent the fin above the insulating material, the fin spacer leaving an upper surface of the fin exposed, and performing at least one etching process to remove at least a portion of the fin positioned between the fin spacer, the fin having a recessed upper surface that at least partially defines a fin recess positioned between the fin spacer. In this example, the method further includes forming an epi semiconductor material on the fin recess and removing the fin spacer from adjacent the epi semiconductor material while leaving a portion of the gate spacer in position adjacent the gate structure.