Invention Grant
- Patent Title: Semiconductor device including oxide semiconductor layer
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Application No.: US15728591Application Date: 2017-10-10
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Publication No.: US10290742B2Publication Date: 2019-05-14
- Inventor: Shunpei Yamazaki , Jun Koyama , Masahiro Takahashi , Hideyuki Kishida , Akiharu Miyanaga , Yasuo Nakamura , Junpei Sugao , Hideki Uochi
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Fish & Richardson P.C.
- Priority: JP2009-235792 20091009
- Main IPC: H01L29/786
- IPC: H01L29/786 ; H01L27/12 ; H01L29/45 ; H01L29/66 ; H01L29/49

Abstract:
It is an object to provide a semiconductor device typified by a display device having a favorable display quality, in which parasitic resistance generated in a connection portion between a semiconductor layer and an electrode is suppressed and an adverse effect such as voltage drop, a defect in signal wiring to a pixel, a defect in grayscale, and the like due to wiring resistance are prevented. In order to achieve the above object, a semiconductor device according to the present invention may have a structure where a wiring with low resistance is connected to a thin film transistor in which a source electrode and a drain electrode that include metal with high oxygen affinity are connected to an oxide semiconductor layer with a suppressed impurity concentration. In addition, the thin film transistor including the oxide semiconductor may be surrounded by insulating films to be sealed.
Public/Granted literature
- US20180047852A1 SEMICONDUCTOR DEVICE Public/Granted day:2018-02-15
Information query
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