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    Semiconductor device and manufacturing method thereof
    2.
    发明授权
    Semiconductor device and manufacturing method thereof 有权

    公开(公告)号：US11527657B2

    公开(公告)日：2022-12-13

    申请号：US16965052

    申请日：2019-02-18

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Yuki Hata ,  Katsuaki Tochibayashi ,  Junpei Sugao ,  Shunpei Yamazaki

    IPC: H01L29/78 ,  H01L29/786 ,  H01L21/3115 ,  H01L27/108

    Abstract: A semiconductor device with a high on-state current is provided. The semiconductor device includes a first oxide, a second oxide over the first oxide, a third oxide over the second oxide, a first insulator over the third oxide, a conductor over the first insulator, a second insulator in contact with the second oxide and the third oxide, and a third insulator over the second insulator; the second oxide includes first region to fifth regions; the resistance of the first region and the resistance of the second region are lower than the resistance of the third region; the resistance of the fourth region and the resistance of the fifth region are lower than the resistance of the third region and higher than the resistance of the first region and the resistance of the second region; and the conductor is provided over the third region, the fourth region, and the fifth region to overlap with the third region, the fourth region, and the fifth region.

    Boosting circuit and RFID tag including boosting circuit
    4.
    发明授权
    Boosting circuit and RFID tag including boosting circuit 有权
    升压电路和RFID标签，包括升压电路

    公开(公告)号：US08982589B2

    公开(公告)日：2015-03-17

    申请号：US14088496

    申请日：2013-11-25

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Yutaka Shionoiri ,  Junpei Sugao

    IPC: H02M3/18 ,  G05F1/10 ,  H02M3/158 ,  H02M3/07 ,  H01L27/06 ,  H01L27/12

    CPC classification number: H02M3/158 ,  H01L27/0688 ,  H01L27/1225 ,  H02M3/073

    Abstract: One object is to provide a boosting circuit whose boosting efficiency is enhanced. Another object is to provide an RFID tag including a boosting circuit whose boosting efficiency is enhanced. A node corresponding to an output terminal of a unit boosting circuit or a gate electrode of a transistor connected to the node is boosted by bootstrap operation, so that a decrease in potential which corresponds to substantially the same as the threshold potential of the transistor can be prevented and a decrease in output potential of the unit boosting circuit can be prevented.

    Abstract translation: 一个目的是提供一种提升效率提高的升压电路。 另一个目的是提供一种RFID标签，其包括提升效率提高的升压电路。 与单元升压电路的输出端子或与该节点连接的晶体管的栅电极对应的节点通过自举运算来升压，使得与晶体管的阈值电位基本相同的电位降低可以是 可以防止单元升压电路的输出电位的降低。

    SEMICONDUCTOR DEVICE
    5.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20130113044A1

    公开(公告)日：2013-05-09

    申请号：US13729322

    申请日：2012-12-28

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Shunpei Yamazaki ,  Jun Koyama ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Akiharu Miyanaga ,  Yasuo Nakamura ,  Junpei Sugao ,  Hideki Uochi

    IPC: H01L29/786

    CPC classification number: H01L29/78669 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1288 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78678 ,  H01L29/7869

    Abstract: It is an object to provide a semiconductor device typified by a display device having a favorable display quality, in which parasitic resistance generated in a connection portion between a semiconductor layer and an electrode is suppressed and an adverse effect such as voltage drop, a defect in signal wiring to a pixel, a defect in grayscale, and the like due to wiring resistance are prevented. In order to achieve the above object, a semiconductor device according to the present invention may have a structure where a wiring with low resistance is connected to a thin film transistor in which a source electrode and a drain electrode that include metal with high oxygen affinity are connected to an oxide semiconductor layer with a suppressed impurity concentration. In addition, the thin film transistor including the oxide semiconductor may be surrounded by insulating films to be sealed.

    Abstract translation: 本发明的目的是提供一种由具有良好的显示质量的显示装置代表的半导体器件，其中在半导体层和电极之间的连接部分中产生的寄生电阻被抑制，并且具有诸如电压降等的不利影响 防止由于布线电阻而导致像素的信号布线，灰度级的缺陷等。 为了实现上述目的，根据本发明的半导体器件可以具有这样的结构，其中具有低电阻的布线连接到薄膜晶体管，其中包括具有高氧亲和力的金属的源电极和漏电极是 连接到具有抑制的杂质浓度的氧化物半导体层。 另外，包含氧化物半导体的薄膜晶体管也可以被要被密封的绝缘膜包围。

    Semiconductor Device and Method for Driving Semiconductor Device
    8.
    发明申请
    Semiconductor Device and Method for Driving Semiconductor Device 审中-公开

    公开(公告)号：US20200211627A1

    公开(公告)日：2020-07-02

    申请号：US16732555

    申请日：2020-01-02

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Tomoaki Atsumi ,  Junpei Sugao

    IPC: G11C11/4094 ,  H01L29/786 ,  H01L27/12 ,  G11C11/4096 ,  G11C11/401 ,  G11C11/4097

    Abstract: The semiconductor device includes a first memory cell, and a second memory cell thereover. The first memory cell includes first and second transistors, and a first capacitor. The second memory cell includes third and fourth transistors, and a second capacitor. A gate of the first transistor is electrically connected to one of a source and a drain of the second transistor and the first capacitor. A gate of the third transistor is electrically connected to one of a source and a drain of the fourth transistor and the second capacitor. One of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the third transistor. The second and fourth transistors include an oxide semiconductor. A channel length direction of the first and third transistors is substantially perpendicular to a channel length direction of the second and fourth transistors.

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