A semiconductor memory device which is capable of high-speed operation in synchronization with external control signals is provided. The semiconductor memory device has a data input portion, a memory array, a data output portion, and a control portion. The data input portion receives command and address input data in response to the external control signals. The memory array has a plurality of memory elements. The data output portion outputs data read from the memory array in response to the external control signals. The control portion has the function of delay-compensation. During the time interval for receiving the input data, the function of delay-compensation estimates the delay time of the internal circuits, stores the estimated delay-time in a memory unit, and adjusts the output timing of the data output portion.