A pixel structure includes first and second gate lines, at least one data line, and a pixel unit. The pixel unit has first and second display areas and includes first and second active devices, a first pixel electrode layer, a common electrode layer, and a second pixel electrode layer. The first and second active devices are electrically connected to the first and second gate lines, respectively. The first pixel electrode layer is electrically connected to the first active device. The common electrode layer is disposed above the first pixel electrode layer and includes first and second portions which are located at the first and second display areas, respectively. The second pixel electrode layer is electrically connected to the second active device, and is located above the first portion of the common electrode layer but not above the second portion, where the second pixel electrode layer has a first slit pattern and the second portion of the common electrode layer has a second slit pattern.