Invention Grant
- Patent Title: Method and apparatus for reducing silent data errors in non-volatile memory systems
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Application No.: US15721394Application Date: 2017-09-29
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Publication No.: US10331345B2Publication Date: 2019-06-25
- Inventor: Wei Fang , Kiran Pangal , Prashant S. Damle
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Alliance IP, LLC
- Main IPC: G11C16/28
- IPC: G11C16/28 ; G06F3/06 ; G06F13/16 ; G06F11/10 ; G06F12/02

Abstract:
In one embodiment, an apparatus comprises a memory array comprising a plurality of phase change memory (PCM) cells; and a controller to determine to read data stored by the plurality of PCM cells independent of a read command from a host device; and in response to the determination to read data stored by the plurality of PCM cells independent of a read command from a host device, perform a dummy read operation on the plurality of PCM cells and perform an additional read operation on the plurality of PCM cells.
Public/Granted literature
- US20190102088A1 METHOD AND APPARATUS FOR REDUCING SILENT DATA ERRORS IN NON-VOLATILE MEMORY SYSTEMS Public/Granted day:2019-04-04
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